Abstract: The semiconductor memory device including a bit line in a first direction on a substrate, a channel structure on the bit line, and including a first vertical part in a second direction, and a second vertical part apart from the first vertical part in the first direction and in the second direction, a back-gate electrode on the bit line on a side of the channel structure and in the second direction, a back-gate insulating film between the back-gate electrode and the channel structure, a back-gate capping film on the back-gate electrode and the back-gate insulating film, a first and second word lines between the first and the second vertical parts and in the second direction, the second word line spaced apart from the first word line in the first direction and first and second capacitors connected to the first and second vertical parts, on the first and second vertical parts.

Abstract: A semiconductor memory device having improved electrical characteristics is provided. The semiconductor memory device comprises a first semiconductor pattern separated from a substrate in a first direction, a first gate structure extending in the first direction and penetrating the first semiconductor pattern, a first conductive connecting line connected to the first semiconductor pattern and extending in a second direction different from the first direction, and a second conductive connecting line connected to the first semiconductor pattern. The first gate structure is between the first conductive connecting line and the second conductive connecting line, the first gate structure includes a first gate electrode and a first gate insulating film, and the first gate insulating film includes a first charge holding film contacting with the first semiconductor pattern.

Abstract: A semiconductor memory device having improved electrical characteristics is provided. The semiconductor memory device comprises a first semiconductor pattern separated from a substrate in a first direction, a first gate structure extending in the first direction and penetrating the first semiconductor pattern, a first conductive connecting line connected to the first semiconductor pattern and extending in a second direction different from the first direction, and a second conductive connecting line connected to the first semiconductor pattern. The first gate structure is between the first conductive connecting line and the second conductive connecting line, the first gate structure includes a first gate electrode and a first gate insulating film, and the first gate insulating film includes a first charge holding film contacting with the first semiconductor pattern.

Abstract: Provided is a semiconductor memory device. The semiconductor memory device comprises a first semiconductor pattern including a first impurity region, a second impurity region, and a channel region, the first impurity region spaced apart from a substrate in a first direction and having a first conductivity type, the second impurity region having a second conductivity type different from the first conductivity type, and the channel region between the first impurity region and the second impurity region, a first conductive connection line connected to the first impurity region and extending in a second direction different from the first direction and a first gate structure extending in the first direction and including a first gate electrode and a first gate insulating film, wherein the first gate electrode penetrates the channel region and the first gate insulating film is between the first gate electrode and the semiconductor pattern.

Abstract: Disclosed is a method and apparatus for measuring a distance to a target object by using a radar signal in an environment where an obstacle is present. The disclosed method of measuring a distance by using a radar includes: receiving a radar signal reflected from a target object by passing through a target obstacle; estimating material of the target obstacle by using an obstacle material learning result which uses a waveform of a reference radar signal, and by using a waveform of the reflected radar signal; estimating a thickness of the target obstacle by using an obstacle thickness learning result which uses a frequency feature of the reference radar signal, and by using a frequency feature of the reflected radar signal; and calculating a distance to the target object by using a permittivity according to the material of the target obstacle, and the thickness of the target obstacle.

Abstract: A semiconductor memory device having improved electrical characteristics is provided. The semiconductor memory device comprises a first semiconductor pattern separated from a substrate in a first direction, a first gate structure extending in the first direction and penetrating the first semiconductor pattern, a first conductive connecting line connected to the first semiconductor pattern and extending in a second direction different from the first direction, and a second conductive connecting line connected to the first semiconductor pattern. The first gate structure is between the first conductive connecting line and the second conductive connecting line, the first gate structure includes a first gate electrode and a first gate insulating film, and the first gate insulating film includes a first charge holding film contacting with the first semiconductor pattern.

Abstract: Provided is a door lock mortise. The door lock mortise includes a structure in which a latch fixing member moves between a latch operating member and a latch cover member when a dead bolt is locked or unlocked. According to the embodiments of the present invention, the door lock mortise including the latch fixing member to have a structural characteristic capable of addressing a problem in that a latch bolt may be moved when the dead bolt is unlocked to release a door lock so that an impact is transmitted only to the dead bolt in a state in which the dead bolt is not unlocked and durability is reduced is disclosed.

Abstract: Provided is a semiconductor memory device. The semiconductor memory device comprises a first semiconductor pattern including a first impurity region, a second impurity region, and a channel region, the first impurity region spaced apart from a substrate in a first direction and having a first conductivity type, the second impurity region having a second conductivity type different from the first conductivity type, and the channel region between the first impurity region and the second impurity region, a first conductive connection line connected to the first impurity region and extending in a second direction different from the first direction and a first gate structure extending in the first direction and including a first gate electrode and a first gate insulating film, wherein the first gate electrode penetrates the channel region and the first gate insulating film is between the first gate electrode and the semiconductor pattern.

Abstract: A neuromorphic device includes a synaptic array, including input lines extending in a first direction and receiving input signals independently from axon circuits connected thereto, bit lines extending in a second direction crossing the first direction and outputting output signals, cell strings that each include at least two resistive memristor elements and a string select transistor in series between an input line and a bit line, electrode pads stacked and spaced apart from each other between the input and bit lines and connected to the string select transistor and at least two resistive memristor elements, a decoder to apply a string selection signal or a word line selection signal to the electrode pads, and neuron circuits, each connected to one of the bit lines connected to one of the cell strings, summing the output signals, converting and outputting the summed signal when it is more than a predetermined threshold.

Abstract: Disclosed is a method and apparatus for measuring a distance to a target object by using a radar signal in an environment where an obstacle is present. The disclosed method of measuring a distance by using a radar includes: receiving a radar signal reflected from a target object by passing through a target obstacle; estimating material of the target obstacle by using an obstacle material learning result which uses a waveform of a reference radar signal, and by using a waveform of the reflected radar signal; estimating a thickness of the target obstacle by using an obstacle thickness learning result which uses a frequency feature of the reference radar signal, and by using a frequency feature of the reflected radar signal; and calculating a distance to the target object by using a permittivity according to the material of the target obstacle, and the thickness of the target obstacle.

Abstract: A semiconductor device includes a substrate, device isolation film defining an active region of the substrate in which a gate trench extends, a gate insulating film disposed along sides and a bottom of the gate trench, a gate electrode disposed on the gate insulating film in the gate trench and having a first portion, a second portion on the first portion, and a third portion on the second portion, a first barrier film pattern interposed between the first portion of the gate electrode and the gate insulating film, a second barrier film pattern interposed between the second portion of the gate electrode and the gate insulating film, and a third barrier film pattern interposed between the third portion of the gate electrode and the gate insulating film. The work function of the first barrier film pattern is greater than the work function of the second barrier film pattern and less than the work function of the third barrier film pattern.

Abstract: A semiconductor device includes a substrate, device isolation film defining an active region of the substrate in which a gate trench extends, a gate insulating film disposed along sides and a bottom of the gate trench, a gate electrode disposed on the gate insulating film in the gate trench and having a first portion, a second portion on the first portion, and a third portion on the second portion, a first barrier film pattern interposed between the first portion of the gate electrode and the gate insulating film, a second barrier film pattern interposed between the second portion of the gate electrode and the gate insulating film, and a third barrier film pattern interposed between the third portion of the gate electrode and the gate insulating film. The work function of the first barrier film pattern is greater than the work function of the second barrier film pattern and less than the work function of the third barrier film pattern.

Abstract: Provided is a door lock mortise. The door lock mortise includes a structure in which a latch fixing member moves between a latch operating member and a latch cover member when a dead bolt is locked or unlocked. According to the embodiments of the present invention, the door lock mortise including the latch fixing member to have a structural characteristic capable of addressing a problem in that a latch bolt may be moved when the dead bolt is unlocked to release a door lock so that an impact is transmitted only to the dead bolt in a state in which the dead bolt is not unlocked and durability is reduced is disclosed.

Abstract: According to an embodiment of the present invention, a tea infuser comprises a hollow body substantially shaped as a truncated cone. The body includes an upper part having an internal thread. A container is threaded into the body through the upper part. A lower part has an external thread. A filter is disposed in the body. The filter has a jaw along an outer circumferential surface thereof. A first cap covers the upper part. A second cap is threaded to the lower part.

Abstract: According to an embodiment of the present invention, a tea infuser comprises a hollow body substantially shaped as a truncated cone. The body includes an upper part having an internal thread. A container is threaded into the body through the upper part. A lower part has an external thread. A filter is disposed in the body. The filter has a jaw along an outer circumferential surface thereof. A first cap covers the upper part. A second cap is threaded to the lower part.