Abstract: An apparatus for estimating biological information may include a sensor configured to detect a first light signal and a second light signal from an object of a user and a processor configured to determine whether a condition for estimating biological information is satisfied based on the detected first light signal and estimate biological information based on the second light signal, wherein the sensor includes a force sensor configured to measure a force applied to the object when the object is in contact with a cover surface of the sensor.

Abstract: A cathode active material with controlled rheological properties for lithium secondary batteries. In particular, the cathode active material for a lithium secondary battery includes: a core part comprising a lithium metal oxide; and a coating layer covering at least a portion of a surface of the core part and comprising an inorganic compound.

Abstract: The present disclosure relates to a photoelectrochemical photoelectrode for water splitting, which includes a plate-type photoelectrode including a transparent electrode substrate and a photoanode layer disposed on the transparent electrode substrate, wherein the plate-type photoelectrode exists in a plural number, and the plural plate-type photoelectrodes are disposed in such a manner that the transparent electrode substrate of one photoelectrode may face the photoanode layer of the other photoelectrode, while being spaced apart from each other. In this manner, it is possible to scale-up the photoelectrochemical photoelectrode for water splitting, while providing improved water splitting performance.

Abstract: A SONOS device and a method of manufacturing the same is provided. A tunnel dielectric layer, a charge trap layer, and a charge blocking layer are formed on a semiconductor substrate, and the charge blocking layer is formed on the charge trap layer such that the charge blocking layer is relatively thicker at regions adjacent to or overlapping the source and the drain and relatively thinner at a region overlapping the channel region. A gate is then formed on the blocking layer.

Abstract: A SONOS device and a method of manufacturing the same is provided. A tunnel dielectric layer, a charge trap layer, and a charge blocking layer are formed on a semiconductor substrate, and the charge blocking layer is formed on the charge trap layer such that the charge blocking layer is relatively thicker at regions adjacent to or overlapping the source and the drain and relatively thinner at a region overlapping the channel region. A gate is then formed on the blocking layer.

Abstract: A fabricating method of a nonvolatile memory device is disclosed. A disclosed method comprises: implanting ions into an active region of a semiconductor substrate to form a well of a low voltage transistor and adjust its threshold voltage; implanting ions into an active region of the semiconductor substrate to form a well of a high voltage transistor and adjust its threshold voltage, thereby forming a conductive region; depositing an ONO layer on the semiconductor substrate; patterning and etching the ONO layer to form an ONO structure; and forming a gate oxide layer on the semiconductor substrate.

Abstract: A SONOS device and a method of manufacturing the same is provided. A tunnel dielectric layer, a charge trap layer, and a charge blocking layer are formed on a semiconductor substrate, and the charge blocking layer is formed on the charge trap layer such that the charge blocking layer is relatively thicker at regions adjacent to or overlapping the source and the drain and relatively thinner at a region overlapping the channel region. A gate is then formed on the blocking layer.

Abstract: Non-volatile SRAMs having an improved recall characteristic are disclosed. An illustrated non-volatile SRAM includes a plurality of unit memory cells arranged in an array. Each of the plurality of unit memory cells comprises a SRAM unit and a non-volatile circuit. The non-volatile circuit includes storage transistors, SONOS transistors connected to the storage transistors, and recall transistors connected to the SONOS transistors. The thickness of the gate insulation films of the recall transistors is thinner than the thickness of the gate insulation films of the storage transistors.

Abstract: Disclosed is a thin film transistor formed on a substrate, comprising a patterned gate electrode formed on said substrate; a channel layer formed around said gate electrode with a gate insulating layer interposed therebetween; a interlayer insulating layer formed on said channel layer; and source and drain electrodes formed on both side walls of said channel layer and on both side portions of said interlayer insulating layer, and isolated from each other. Each of the channel and source/drain layers is composed of polysilicon with impurity ions. In the thin film transistor, because each of the source and drain electrodes is formed relatively thicker than the channel layer, them can be significantly reduced in resistance.