Patents by Inventor Sunil A. Kulkarni

Sunil A. Kulkarni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230280793
    Abstract: A device includes an enclosure and logic. The enclosure includes a plurality of capacitive touch sensor arrays disposed at least on two of a top side, a bottom side, a left side, a right side, a front side, and a back side of the device. The enclosure also includes a first display on the front side of the device. The logic receives touch interaction information from the plurality of capacitive touch sensor arrays and initiates an action based at least in part on the touch interaction information.
    Type: Application
    Filed: March 6, 2023
    Publication date: September 7, 2023
    Applicant: Intel Corporation
    Inventors: Min Liu, Lakshman Krishnamurthy, David L. Graumann, Jameson H. Williams, Miriam K. Selvaraj, Bryan R. Peebler, Wendy A. March, Brian K. Vogel, Wenbo Shen, Sihua Tian, Lijuan Xiao, Tao Wang, Xiaoyan Dang, Nithyananda S. Jeganathan, Sunil A. Kulkarni, Sherman Chan Wai Lee, Kaining Yuan
  • Patent number: 11599154
    Abstract: A device includes an enclosure and logic. The enclosure includes a plurality of capacitive touch sensor arrays disposed at least on two of a top side, a bottom side, a left side, a right side, a front side, and a back side of the device. The enclosure also includes a first display on the front side of the device. The logic receives touch interaction information from the plurality of capacitive touch sensor arrays and initiates an action based at least in part on the touch interaction information.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 7, 2023
    Assignee: Intel Corporation
    Inventors: Min Liu, Lakshman Krishnamurthy, David L. Graumann, Jameson H. Williams, Miriam K. Selvaraj, Bryan R. Peebler, Wendy A. March, Brian K. Vogel, Wenbo Shen, Sihua Tian, Lijuan Xiao, Tao Wang, Xiaoyan Dang, Nithyananda S. Jeganathan, Sunil A. Kulkarni, Sherman Chan Wai Lee, Kaining Yuan
  • Publication number: 20220057841
    Abstract: A device includes an enclosure and logic. The enclosure includes a plurality of capacitive touch sensor arrays disposed at least on two of a top side, a bottom side, a left side, a right side, a front side, and a back side of the device. The enclosure also includes a first display on the front side of the device. The logic receives touch interaction information from the plurality of capacitive touch sensor arrays and initiates an action based at least in part on the touch interaction information.
    Type: Application
    Filed: August 30, 2021
    Publication date: February 24, 2022
    Applicant: Intel Corporation
    Inventors: Min Liu, Lakshman Krishnamurthy, David L. Graumann, Jameson H. Williams, Miriam K. Selvaraj, Bryan R. Peebler, Wendy A. March, Brian K. Vogel, Wenbo Shen, Sihua Tian, Lijuan Xiao, Tao Wang, Xiaoyan Dang, Nithyananda S. Jeganathan, Sunil A. Kulkarni, Sherman Chan Wai Lee, Kaining Yuan
  • Patent number: 11106246
    Abstract: A device includes an enclosure and logic. The enclosure includes a plurality of capacitive touch sensor arrays disposed at least on two of a top side, a bottom side, a left side, a right side, a front side, and a back side of the device. The enclosure also includes a first display on the front side of the device. The logic receives touch interaction information from the plurality of capacitive touch sensor arrays and initiates an action based at least in part on the touch interaction information.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: August 31, 2021
    Assignee: Intel Corporation
    Inventors: Min Liu, Lakshman Krishnamurthy, David L. Graumann, Jameson H. Williams, Miriam K. Selvaraj, Bryan R. Peebler, Wendy A. March, Brian K. Vogel, Wenbo Shen, Sihua Tian, Lijuan Xiao, Tao Wang, Xiaoyan Dang, Nithyananda S. Jeganathan, Sunil A. Kulkarni, Sherman Chan Wai Lee, Kaining Yuan
  • Publication number: 20210132665
    Abstract: A device includes an enclosure and logic. The enclosure includes a plurality of capacitive touch sensor arrays disposed at least on two of a top side, a bottom side, a left side, a right side, a front side, and a back side of the device. The enclosure also includes a first display on the front side of the device. The logic receives touch interaction information from the plurality of capacitive touch sensor arrays and initiates an action based at least in part on the touch interaction information.
    Type: Application
    Filed: November 9, 2020
    Publication date: May 6, 2021
    Applicant: Intel Corporation
    Inventors: Min Liu, Lakshman Krishnamurthy, David L. Graumann, Jameson H. Williams, Miriam K. Selvaraj, Bryan R. Peebler, Wendy A. March, Brian K. Vogel, Wenbo Shen, Sihua Tian, Lijuan Xiao, Tao Wang, Xiaoyan Dang, Nithyananda S. Jeganathan, Sunil A. Kulkarni, Sherman Chan Wai Lee, Kaining Yuan
  • Patent number: 10831318
    Abstract: A device includes an enclosure and logic. The enclosure includes a plurality of capacitive touch sensor arrays disposed at least on two of a top side, a bottom side, a left side, a right side, a front side, and a back side of the device. The enclosure also includes a first display on the front side of the device. The logic receives touch interaction information from the plurality of capacitive touch sensor arrays and initiates an action based at least in part on the touch interaction information.
    Type: Grant
    Filed: December 24, 2013
    Date of Patent: November 10, 2020
    Assignee: Intel Corporation
    Inventors: Min Liu, Lakshman Krishnamurthy, David L. Graumann, Jameson H. Williams, Miriam K. Selvaraj, Bryan R. Peebler, Wendy A. March, Brian K. Vogel, Wenbo Shen, Sihua Tian, Lijuan Xiao, Tao Wang, Xiaoyan Dang, Nithyananda S. Jeganathan, Sunil A. Kulkarni, Chan Wai Lee, Kaining Yuan
  • Patent number: 9576139
    Abstract: Techniques for implementing a secure graphics architecture are described. In one embodiment, for example, an apparatus may comprise a processor circuit and a graphics management module, and the graphics management module may be operative to receive graphics information from the processor circuit, generate graphics processing information based on the graphics information, and send the graphics processing information to a graphics processor circuit arranged to generate graphics display information based on the graphics processing information. In this manner, security threats such as screen capture attacks and/or theft of content protected media streams may be reduced. Other embodiments may be described and claimed.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: February 21, 2017
    Assignee: INTEL CORPORATION
    Inventor: Sunil A. Kulkarni
  • Publication number: 20160291731
    Abstract: A device includes an enclosure and logic. The enclosure includes a plurality of capacitive touch sensor arrays disposed at least on two of a top side, a bottom side, a left side, a right side, a front side, and a back side of the device. The enclosure also includes a first display on the front side of the device. The logic receives touch interaction information from the plurality of capacitive touch sensor arrays and initiates an action based at least in part on the touch interaction information.
    Type: Application
    Filed: December 24, 2013
    Publication date: October 6, 2016
    Inventors: Min Liu, Lakshman Krishnamurthy, David L. Graumann, Jameson H. Williams, Miriam K. Selvaraj, Bryan R. Peebler, Wendy A. March, Brian K. Vogel, Wenbo Shen, Sihua Tian, Lijuan Xiao, Tao Wang, Xiaoyan Dang, Nithyananda S. Jeganathan, Sunil A. Kulkarni, Chan Wai Lee, Kaining Yuan
  • Publication number: 20140043344
    Abstract: Techniques for implementing a secure graphics architecture are described. In one embodiment, for example, an apparatus may comprise a processor circuit and a graphics management module, and the graphics management module may be operative to receive graphics information from the processor circuit, generate graphics processing information based on the graphics information, and send the graphics processing information to a graphics processor circuit arranged to generate graphics display information based on the graphics processing information. In this manner, security threats such as screen capture attacks and/or theft of content protected media streams may be reduced. Other embodiments may be described and claimed.
    Type: Application
    Filed: March 16, 2012
    Publication date: February 13, 2014
    Inventor: Sunil A. Kulkarni
  • Patent number: 7791613
    Abstract: A graphics device delivers a graphics address to a graphics memory switch that includes a graphics random access memory translator and a graphics memory page table. The graphics memory address is delivered to the graphics memory switch via a point-to-point, packet based interconnect. The graphics memory switch generates a physical system memory address and delivers the physical address to a root complex. The physical system memory address is delivered to the root complex via a point-to-point, packet based interconnect.
    Type: Grant
    Filed: May 6, 2008
    Date of Patent: September 7, 2010
    Assignee: Intel Corporation
    Inventor: Sunil A. Kulkarni
  • Publication number: 20080204467
    Abstract: A graphics device delivers a graphics address to a graphics memory switch that includes a graphics random access memory translator and a graphics memory page table. The graphics memory address is delivered to the graphics memory switch via a point-to-point, packet based interconnect. The graphics memory switch generates a physical system memory address and delivers the physical address to a root complex. The physical system memory address is delivered to the root complex via a point-to-point, packet based interconnect.
    Type: Application
    Filed: May 6, 2008
    Publication date: August 28, 2008
    Inventor: Sunil A. Kulkarni
  • Patent number: 7411591
    Abstract: A graphics device delivers a graphics address to a graphics memory switch that includes a graphics random access memory translator and a graphics memory page table. The graphics memory address is delivered to the graphics memory switch via a point-to-point, packet based interconnect. The graphics memory switch generates a physical system memory address and delivers the physical address to a root complex. The physical system memory address is delivered to the root complex via a point-to-point, packet based interconnect.
    Type: Grant
    Filed: December 24, 2003
    Date of Patent: August 12, 2008
    Assignee: Intel Corporation
    Inventor: Sunil A. Kulkarni
  • Patent number: 7184050
    Abstract: Methods and apparatus for use with AGP-capable computer systems are disclosed. Since each AGP-capable chipset can have a unique range of graphics port aperture sizes that it supports, current graphics port aperture drivers are chipset-specific, with hard-coded tables of supported graphics aperture sizes. Described herein is a driver that dynamically ascertains the range of supported graphics aperture port sizes for an attached AGP-capable chipset, thus allowing this driver to be ported between different chipsets without manual reconfiguration and recompiling. The method employed in the driver sends one or more test aperture size values to a register resident in the chipset, and then reads what is written to see if the chipset changed any of the bits of the test value. The method infers supported sizes from examining which, if any bits, were changed by the chipset.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: February 27, 2007
    Assignee: Intel Corporation
    Inventor: Sunil A. Kulkarni
  • Patent number: 6933944
    Abstract: Methods and apparatus for use with AGP-capable computer systems are disclosed. Since each AGP-capable chipset can have a unique range of graphics port aperture sizes that it supports, current graphics port aperture drivers are chipset-specific, with hard-coded tables of supported graphics aperture sizes. Described herein is a driver that dynamically ascertains the range of supported graphics aperture port sizes for an attached AGP-capable chipset, thus allowing this driver to be ported between different chipsets without manual reconfiguration and recompiling. The method employed in the driver sends one or more test aperture size values to a register resident in the chipset, and then reads what is written to see if the chipset changed any of the bits of the test value. The method infers supported sizes from examining which, if any bits, were changed by the chipset.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: August 23, 2005
    Assignee: Intel Corporation
    Inventor: Sunil A. Kulkarni
  • Publication number: 20030179209
    Abstract: Methods and apparatus for use with AGP-capable computer systems are disclosed. Since each AGP-capable chipset can have a unique range of graphics port aperture sizes that it supports, current graphics port aperture drivers are chipset-specific, with hard-coded tables of supported graphics aperture sizes. Described herein is a driver that dynamically ascertains the range of supported graphics aperture port sizes for an attached AGP-capable chipset, thus allowing this driver to be ported between different chipsets without manual reconfiguration and recompiling. The method employed in the driver sends one or more test aperture size values to a register resident in the chipset, and then reads what is written to see if the chipset changed any of the bits of the test value. The method infers supported sizes from examining which, if any bits, were changed by the chipset.
    Type: Application
    Filed: March 21, 2002
    Publication date: September 25, 2003
    Inventor: Sunil A. Kulkarni