Abstract: This application discloses an electronic design automation tool configured to identify combinational loops in a word-level netlist, and then modify the word-level netlist based on the presence of the combinational loops. The electronic design automation tool can analyze the word-level netlist to identify a portion of the word-level netlist having at least one characteristic associated with a combinational loop, translate the identified portion of the word-level netlist into a bit-level circuit representation, and utilize the bit-level circuit representation to determine whether the identified portion of the word-level netlist implements the combinational loop. The electronic design automation tool can modify the word-level netlist by replacing the identified combination loop in the word-level netlist with a description of a different circuit, such as a loop buffer, or annotate the presence of the identified combinational loop in the word-level netlist.