Patents by Inventor Sunil Patel

Sunil Patel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6335491
    Abstract: The present invention describes an interposer which improves the thermal performance of a semiconductor device. The interposer may be situated between a substrate and a board. The interposer is attached to two layers of solder balls. The first layer of solder balls electrically and mechanically connects the interposer to the substrate. The second layer of solder balls electrically and mechanically connects the interposer to the board. In one aspect, the coefficient of thermal expansion (CTE) of the interposer may be flexibly selected to reduce thermal strain-induced stress for either or both layers of solder balls resulting from thermal performance differences between the substrate and the interposer or the interposer and the board. In another aspect, the CTE of the interposer may be reduced to allow a lower CTE for the substrate, which in turn may reduce thermal strain-induced stress for solder balls between the substrate and a die attached to the substrate.
    Type: Grant
    Filed: February 8, 2000
    Date of Patent: January 1, 2002
    Assignee: LSI Logic Corporation
    Inventors: Maniam Alagaratnam, Kishor V. Desai, Sunil A. Patel
  • Patent number: 6306751
    Abstract: Provided is an apparatus and method for modifying the manufacture of chip carrier bond pads to increase the quality and reliability of semiconductor packages and ball joints in particular. This is accomplished by minimizing the corrosion of the barrier metal layer on the functional bond pads during gold deposition with the use of sacrificial pads electrically connected with the functional bond pads. According to one embodiment of the invention, a semiconductor package has copper conductive pads on a substrate that are exposed through a dielectric. Both functional and sacrificial (nonfunctional) copper conductive pads are provided. A barrier metal layer composed of nickel is electrolessly plated onto these conductive pads, and a bond metal layer of gold is deposited onto the nickel using electroless, generally immersion, gold plating.
    Type: Grant
    Filed: September 27, 1999
    Date of Patent: October 23, 2001
    Assignee: LSI Logic Corporation
    Inventors: Sunil A. Patel, Chok J. Chia, Kishor V. Desai
  • Patent number: 6266249
    Abstract: A semiconductor package is present along with an associated method. The package comprises a substrate with a top surface and a bottom surface, the substrate having a plurality of electrically conductive vias extending from the top surface of the substrate to the bottom surface of the substrate. A semiconductor device having an active surface, the active surface having a plurality of bonding pads, is attached to the substrate by an adhesive that bas holes that align with the vias. The vias are also aligned with the bonding pads. Solder serves to electrically and mechanically couple each of the bonding pads with a corresponding via. Each of the vias, in turn, is coupled to a solder ball formed on the bottom of the substrate.
    Type: Grant
    Filed: August 16, 1999
    Date of Patent: July 24, 2001
    Assignee: LSI Logic Corporation
    Inventors: Kishor V. Desai, Sunil Patel, Ramaswamy Ranganathan
  • Patent number: 6166434
    Abstract: Provided is a die clip for use in semiconductor flip chip packaging as a replacement for the conventional combination of a heat spreader and stiffener, a packaging method using the die clip, and a semiconductor package incorporating the die clip. In a preferred embodiment, the die clip is a piece of high modulus, high thermal conductivity material shaped to attach over a die on the surface of a packaging substrate. The die clip closely engages the die while leaving some space open around the perimeter to provide access to the die. An underfill material may then be dispensed into the gap between the die and the substrate through an opening in the die clip. The underfill material is then cured, the die clip providing a heat sink and keeping the die and substrate flat and immobile during and after the curing process. A BGA process may then be used to apply solder balls to the underside of the substrate for subsequent bonding of the package to a circuit board for use.
    Type: Grant
    Filed: September 23, 1997
    Date of Patent: December 26, 2000
    Assignee: LSI Logic Corporation
    Inventors: Kishor V. Desai, Sunil A. Patel, John P. McCormick
  • Patent number: 6020221
    Abstract: The subject method comprises providing a semiconductor package and a semiconductor package substrate having respective first and second major sides. A stiffener member, which is attachable to the semiconductor package substrate, is employed for purposes of minimizing package warpage. The stiffener member is attached to the semiconductor package substrate to provide the requisite support for the semiconductor package substrate during the assembly process and thereby counteract the sources of the package warpage problem. A protective outer layer can be optionally added to the subject system.
    Type: Grant
    Filed: December 12, 1996
    Date of Patent: February 1, 2000
    Assignee: LSI Logic Corporation
    Inventors: Sengsooi Lim, Ramaswamy Ranganathan, Sunil A. Patel
  • Patent number: 6002171
    Abstract: Provided is a multi-piece integrated heat spreader/stiffener assembly which is bonded to the substrate and die in a semiconductor package following electrical bonding of the die to the substrate, a packaging method using the integrated heat spreader/stiffener, and a semiconductor package incorporating the integrated heat spreader/stiffener. In a preferred embodiment, the integrated heat spreader/stiffener assembly has two pieces, both composed of a high modulus, high thermal conductivity material shaped to attach to each other and a die on the surface of a packaging substrate. A first piece of this assembly is bonded to the substrate surface adjacent to an electrically connected die and to the top surface of the die prior to the dispensation and curing of underfill material which provides the mechanical connection between the die and the substrate. With the first piece of the assembly in place, access may still be had to at least one edge of the die to dispense and cure the underfill epoxy.
    Type: Grant
    Filed: September 22, 1997
    Date of Patent: December 14, 1999
    Assignee: LSI Logic Corporation
    Inventors: Kishor V. Desai, Sunil A. Patel, John P. McCormick
  • Patent number: 5998242
    Abstract: A semiconductor chip fabrication assembly and method including a semiconductor package having a packaging substrate and a semiconductor die. An active circuit surface of the semiconductor die is positioned adjacent to a contact surface of the packaging substrate such that a substantially thin gap is formed therebetween. A semi-rigid shroud device is provided which defines a vacuum chamber configured to extend around the gap to hermetically seal the gap within the vacuum chamber. A dispensing device is provided having an outlet end positioned proximate the gap in the vacuum chamber which is adapted to vacuum flow the bonding material between the electrical contacts in the gap, and between the active circuit surface and the contact surface. The absence of air and any other gases forms a substantially voidless underfill layer of bonding material in the gap.
    Type: Grant
    Filed: October 27, 1997
    Date of Patent: December 7, 1999
    Assignee: LSI Logic Corporation
    Inventors: Galen C. Kirkpatrick, Manickam Thavarajah, Sunil A. Patel, Stephen A. Murphy
  • Patent number: 5909057
    Abstract: Provided is a single-piece integrated heat spreader/stiffener which is bonded to the substrate and die in a semiconductor package following electrical bonding of the die to the substrate, a packaging method using the integrated heat spreader/stiffener, and a semiconductor package incorporating the integrated heat spreader/stiffener. In a preferred embodiment, the integrated heat spreader/stiffener is a piece of high modulus, high thermal conductivity material shaped to attach over a die on the surface of a packaging substrate. The heat spreader/stiffener is equipped with a plurality of apertures to provide access to the top surface of the die for adhesive to bond the heat spreader/stiffener to the die, and to its perimeter to provide access for dispensation of underfill material between the die and the substrate. Once the adhesive and underfill materials are in place, the adhesive and underfill resins are cured by heating.
    Type: Grant
    Filed: September 23, 1997
    Date of Patent: June 1, 1999
    Assignee: LSI Logic Corporation
    Inventors: John P. McCormick, Sunil A. Patel
  • Patent number: 5559686
    Abstract: A stepped waveform inverter and control therefor utilizes the inverter itself as a divide-by-N counter in a phase-locked loop to assure precise control over the output phase and frequency of the inverter.
    Type: Grant
    Filed: July 8, 1994
    Date of Patent: September 24, 1996
    Assignee: Sundstrand Corporation
    Inventors: Sunil Patel, Chai-Nam Ng, P. John Dhyanchand, Vietson M. Nguyen, Michael Teagardin
  • Patent number: 5301098
    Abstract: An inverter system for inverting variable input DC and providing therefrom controlled output AC including a feedforward sensor for sensing a variable parameter of the input DC, a feedback AC sensor for sensing the controlled output AC and an inverter controller responsive to the variable parameter of the input DC and to the controlled output AC for regulating the magnitude of the controlled output AC.
    Type: Grant
    Filed: July 9, 1992
    Date of Patent: April 5, 1994
    Assignee: Sundstrand Corporation
    Inventors: P. John Dhyanchand, Vietson M. Nguyen, Sunil Patel, Chai-Nam Ng
  • Patent number: 5282125
    Abstract: Control pulses having a first frequency are supplied to the switches of an inverter by a controller. During initial operation of the inverter, however, a softstart circuit supplied pulses to the inverter switches of the inverter wherein the soft-start pulses have a second frequency. The second frequency is constant and higher than the first frequency.
    Type: Grant
    Filed: May 13, 1992
    Date of Patent: January 25, 1994
    Assignee: Sundstrand Corporation
    Inventors: P. John Dhyanchand, Chai-Nam Ng, Sunil Patel, Vietson M. Nguyen
  • Patent number: 5225973
    Abstract: A regulator circuit for an inverter having first and second inverter sections that develop first and second AC waveforms which are phase displaced by a variable angle .alpha. wherein the first and second AC waveforms are combined to produce AC output power includes a reference signal generator that develops a reference signal having a transition between two states at a first time, a memory storing a plurality of words each representing a value of .alpha. add a circuit for accessing the memory with a deviation signal such that the memory provides a word at an output thereof. A counter is provided and a timing circuit causes the counter to load the word at a time prior to the first time. At the first time a gating circuit provides a plurality of clock pulses to a clock input of the counter whereby the counter decrements the loaded word as the clock pulses are received by the counter.
    Type: Grant
    Filed: September 13, 1990
    Date of Patent: July 6, 1993
    Inventors: Sunil Patel, Chai-Nam Ng, Vietson Nguyen, P. John Dhyanchand
  • Patent number: 5041958
    Abstract: An inverter for use in a power conversion system of the type used in an aircraft, for example, includes a first subinverter pair that generates a first pair of waveforms and a second subinverter pair that generates a second pair of waveforms. The two subinverter pairs are connected to a summing transformer having two pairs of primary windings and a plurality of secondary windings coupled to the primary windings. A regulator is coupled to the output of the summing transformer and varies the phase angles between the waveforms generated by the two subinverter pairs based upon the voltage and current at the output of the summing transformer in order to regulate the voltage at the output of the summing transformer.
    Type: Grant
    Filed: December 20, 1989
    Date of Patent: August 20, 1991
    Assignee: Sundstrand Corporation
    Inventors: P. John Dhyanchand, Sunil Patel, Chai-nam Ng, Vietson Nguyen
  • Patent number: 5041957
    Abstract: An inverter for use in a power conversion system of the type used in an aircraft, for example, includes a first subinverter pair that generates a first pair of waveforms, a second subinverter pair that generates a second pair of waveforms, and a third subinverter pair that generates a third pair of waveforms. The three subinverter pairs are connected to a summing transformer having first, second and third transformers. A regulator is coupled to the output of the summing transformer and varies the phase angles between the three pairs of waveforms generated by the three subinverter pairs based upon the voltage and current at the output of the summing transformer in order to regulate the voltage at the output of the summing transformer.
    Type: Grant
    Filed: December 20, 1989
    Date of Patent: August 20, 1991
    Assignee: Sundstrand Corporation
    Inventors: P. John Dhyanchand, Sunil Patel, Chai-Nan Ng, Vietson Nguyen
  • Patent number: 5040105
    Abstract: An inverter for use in a variable-speed, constant-frequency power conversion system of the type used in an aircraft, for example, includes a four subinverter pairs, each of which generates a respective set of waveforms. The four subinverter pairs are connected to a summing transformer having eight sets pairs of primary windings and eight sets of secondary windings coupled to the primary windings. A regulator is coupled to the output of the summing transformer and varies the phase angles between the waveforms generated by the four subinverter pairs based upon the voltage and current at the output of the summing transformer in order to regulate the voltage at the output of the summing transformer.
    Type: Grant
    Filed: December 20, 1989
    Date of Patent: August 13, 1991
    Assignee: Sundstrand Corporation
    Inventors: P. John Dhyanchand, Sunil Patel, Chai-Nam Ng, Vietson Nguyen
  • Patent number: 5031086
    Abstract: A hybrid power system which converts variable-frequency power developed by a brushless generator into DC power which is supplied to a DC load and constant-frequency AC power which is supplied to an AC load includes an AC/DC converter coupled to a main generator portion armature winding of the generator which converts the variable-frequency power produced by the generator into the DC power and a DC/AC converter coupled to the AC/DC converter which converts the DC power into the constant-frequency AC power. A first regulator is coupled to an exciter portion field winding of the generator for supplying current thereto in dependence upon a parameter of the DC power to maintain such parameter substantially at a regulated DC value. A second regulator is coupled to the DC/AC converter for controlling same in accordance with a parameter of the constant-frequency AC power to maintain such parameter substantially at a regulated AC value.
    Type: Grant
    Filed: December 20, 1989
    Date of Patent: July 9, 1991
    Assignee: Sundstrand Corporation
    Inventors: P. John Dhyanchand, Sunil Patel, Chai-Nam Ng, Vietson Nguyen
  • Patent number: 5027265
    Abstract: A regulator for a stepped-waveform inverter having first and second subinverters which produce waveforms having a variable phase displacement therebetween and a summing transformer which sums the outputs of the subinverters includes circuitry for detecting a deviation of a parameter of the AC output power produced by the inverter from a reference and circuitry coupled to the detecting circuitry for deriving a phase command signal from the detected deviation. A comparator compares the phase command signal with a ramp signal to obtain a comparison signal and circuitry operates the first and second subinverters responsive to the comparison signal to cause the phase displacement to vary in accordance with the phase command signal.
    Type: Grant
    Filed: December 20, 1989
    Date of Patent: June 25, 1991
    Assignee: Sundstrand Corporation
    Inventors: P. John Dhyanchand, Sunil Patel, Chai-Nam Ng, Vietson Nguyen
  • Patent number: 5012177
    Abstract: Prior power conversion system operable in generating and starting modes have utililzed brushless generators which are suitable for only certain applications. In order to overcome this problem, a power conversion system operable in generating and starting modes utilizes a switched reluctance motor/generator which is reliable and inexpensive and which can be used in a variety of environments.
    Type: Grant
    Filed: December 19, 1989
    Date of Patent: April 30, 1991
    Assignee: Sundstrand Corporation
    Inventors: P. John Dhyanchand, Sunil Patel, Chai-Nam Ng, Vietson Nguyen
  • Patent number: 5008797
    Abstract: Prior power converters utilizing a plurality of switches operated by control circuitry include many components which are subject to failure. When such a failure occurs, it may prove difficult to isolate the problem and repair the power converter. In order to overcome this problem, a power converter is packaged as a plurality of identical line replaceable units each of which may be easily replaced in the event of a malfunction.
    Type: Grant
    Filed: December 20, 1989
    Date of Patent: April 16, 1991
    Assignee: Sundstrand Corporation
    Inventors: Sunil Patel, Robert Ligon, P. John Dhyanchand