Abstract: An integrated circuit includes a first multiplexer (mux) with multiple inputs and configured to produce a mux output signal. The electronic circuit also includes a first gated buffer to receive the mux output signal from the first multiplexer and produce a first gated buffer output signal, a second gated buffer to receive the first gated buffer output signal and to produce a second gated buffer output signal to be provided to a pin, and a receive buffer. The receive buffer is coupled to the pin and receives an input signal from the pin. The electronic circuit operates in a test mode in which the second gated buffer is disabled preventing a test signal provided to an input of the first mux from reaching the pin. Instead, the test signal is provided through the first mux to the first gated buffer and to the receive buffer thereby testing the first mux.

Abstract: An integrated circuit includes a first multiplexer (mux) with multiple inputs and configured to produce a mux output signal. The electronic circuit also includes a first gated buffer to receive the mux output signal from the first multiplexer and produce a first gated buffer output signal, a second gated buffer to receive the first gated buffer output signal and to produce a second gated buffer output signal to be provided to a pin, and a receive buffer. The receive buffer is coupled to the pin and receives an input signal from the pin. The electronic circuit operates in a test mode in which the second gated buffer is disabled preventing a test signal provided to an input of the first mux from reaching the pin. Instead, the test signal is provided through the first mux to the first gated buffer and to the receive buffer thereby testing the first mux.

Abstract: A microcontroller includes a microcontroller core and an analog-to-digital converter (“ADC”) coupled to said microcontroller core. The ADC has multiple input channel multiplexers that are configured to receive multiple analog input channels. The microcontroller further includes a selection register and a data structure. The data structure comprises a plurality of associated field sets. Each bit position in the selection register indexes to one of the associated field sets in the data structure, and the value contained in each such bit position indicates whether or not to select the corresponding associated field set for selection of an analog input channel. Each associated field set comprises one or more values collectively specifying an analog input channel to select for conversion to digital form.

Abstract: A microcontroller includes a microcontroller core and an analog-to-digital converter (“ADC”) coupled to said microcontroller core. The ADC has multiple input channel multiplexers that are configured to receive multiple analog input channels. The microcontroller further includes a selection register and a data structure. The data structure comprises a plurality of associated field sets. Each bit position in the selection register indexes to one of the associated field sets in the data structure, and the value contained in each such bit position indicates whether or not to select the corresponding associated field set for selection of an analog input channel. Each associated field set comprises one or more values collectively specifying an analog input channel to select for conversion to digital form.

Abstract: In an analog-to-digital converter used to convert and store in buffer registers signals from a plurality of peripheral devices, a mode is provided wherein the processing unit can directly access the buffer registers into which the conversion results have been stored.

Abstract: In an analog-to-digital converter used to convert and store in buffer registers signals from a plurality of peripheral devices, a mode is provided wherein, for selected peripherals, the most recent converted signal overlays the previously stored signal in the buffer registers.

Abstract: In response to a selected analog applied to the input terminal of an analog-to-digital converter, the digitized output signal is stored in a buffer/register. In making a comparison with a predetermined value, a second buffer/register stores either a preselected value or a second digitized signal. A comparator is coupled to the first and the second buffer/register to provide the result of a comparison. In this manner, the central processing unit is not involved in the comparison testing procedure.

Abstract: In an analog-to-digital converter used to convert and store in buffer registers signals from a plurality of peripheral devices, a mode is provided wherein the processing unit can directly access the buffer registers into which the conversion results have been stored.

Abstract: In an analog-to-digital converter used to convert and store in buffer registers signals from a plurality of peripheral devices, a mode is provided wherein, for selected peripherals, the most recent converted signal overlays the previously stored signal in the buffer registers.

Abstract: In response to a selected analog applied to the input terminal of an analog-to-digital converter, the digitized output signal is stored in a buffer/register. In making a comparison with a predetermined value, a second buffer/register stores either a preselected value or a second digitized signal. A comparator is coupled to the first and the second buffer/register to provide the result of a comparison. In this manner, the central processing unit is not involved in the comparison testing procedure.