Abstract: Methods and systems are provided for engine sound synthesis. In one example, a method may include generating a vehicle sound at a modified pitch for a range of engine speeds by selecting intermediate segments of a sample sound and applying synchronous pitch overlapping added from the sample sound. The sound samples may be engine sounds recorded at specific RPM and the pitch modified based on a desired RPM.

Abstract: Various embodiments are provided reusing an operand in an instruction set architecture (ISA) by one or more processors in a computing system. An instruction may specify that an operand register for a selected operand retain operand data used by a previous instruction. The operand data in the operand register may be reused by the instruction.

Abstract: A reduced precision based programmable and single instruction multiple data (SIMD) dataflow architecture includes reduced precision execution units with a majority of the execution units operating at reduced precision and a minority of the execution units are capable of operating at higher precision. The execution units operate in parallel within a programmable execution element to share instruction fetch, decode, and issue pipelines and operate on the same instruction in lock-step to minimize instruction-related overhead.

Abstract: Various embodiments are provided for facilitating data processing by one or more processors in a computing system. An instruction to be executed may be obtained. The instruction is a single instruction multiple data (SIMD) reduction operation of an operand vector with a plurality of vector elements. The SIMD reduction operation may be executed to produce a result vector with a plurality of alternative vector elements. One or more reduction functions may be performed on each of a pair of vector elements from the plurality of vector elements of the operand vector and a result of the one or more reduction functions may be placed in a corresponding vector element of the result vector.

Abstract: Various embodiments are provided for using a reduced precision based programmable and single instruction multiple data (SIMD) dataflow architecture in a computing environment. One or more instructions between a plurality of execution units (EUs) operating in parallel within each one of a plurality of execution elements (EEs).

Abstract: Various embodiments are provided for facilitating data processing by one or more processors in a computing system. An instruction to be executed may be obtained. The instruction is a single instruction multiple data (SIMD) reduction operation of an operand vector with a plurality of vector elements. The SIMD reduction operation may be executed to produce a result vector with a plurality of alternative vector elements. One or more reduction functions may be performed on each of a pair of vector elements from the plurality of vector elements of the operand vector and a result of the one or more reduction functions may be placed in a corresponding vector element of the result vector.

Abstract: Various embodiments are provided reusing an operand in an instruction set architecture (ISA) by one or more processors in a computing system. An instruction may specify that an operand register for a selected operand retain operand data used by a previous instruction. The operand data in the operand register may be reused by the instruction.

Abstract: A method is provided of slewing a bandwidth characteristic of a digital filter within a range between a first bandwidth characteristic and a second bandwidth characteristic. The digital filter includes a plurality of cascaded filter sections, each filter section being comprised of a second order filter having coefficients a1, a2, b0, b1, and b2. An index value is determined for identifying a desired bandwidth characteristic within the range. Values are interpolated for the coefficient values for the a1 and a2 coefficients of a respective filter section in response to the index value. Coefficient values are derived for the b0, b1, and b2 coefficients in response to the coefficient values for the a1 and a2 coefficients such that the b0, b1, and b2 coefficient values provide a matched gain for the respective filter section. The coefficient values are loaded into the respective filter section.

Abstract: A method for slewing a bandwidth characteristic of a digital filter within a range between a first bandwidth characteristic and a second bandwidth characteristic. The digital filter includes a plurality of cascaded filter sections and each of the sections has respective coefficients. The method establishes a polynomial having an order greater than or equal to two for modeling a changing value of one of the coefficients at the bandwidth characteristics within the range. An index value is determined for identifying a desired bandwidth characteristic within the range. The index value is input into the polynomial to obtain a corresponding coefficient value for the one coefficient. The coefficient value is then loaded into a respective filter section.

Abstract: A method for deriving a polynomial for generating filter coefficients to be used in a digital filter in an electronic unit having a digital signal processor. The digital filter has a plurality of reconfigurable filter sections to achieve a desired bandwidth characteristic between a first characteristic with a first cutoff frequency and a second characteristic with a second cutoff frequency. A first set of filter coefficients is determined for providing the first characteristic. A second set of filter coefficients is determined for providing the second characteristic. A third set of filter coefficients is determined for providing a third characteristic having a third cutoff frequency between the first and second cutoff frequencies.

Abstract: A method for slewing a bandwidth characteristic of a digital filter within a range between a first bandwidth characteristic and a second bandwidth characteristic. The digital filter includes a plurality of cascaded filter sections and each of the sections has respective coefficients. The method establishes a polynomial having an order greater than or equal to two for modeling a changing value of one of the coefficients at the bandwidth characteristics within the range. An index value is determined for identifying a desired bandwidth characteristic within the range. The index value is input into the polynomial to obtain a corresponding coefficient value for the one coefficient. The coefficient value is then loaded into a respective filter section.

Abstract: A method for deriving a polynomial for generating filter coefficients to be used in a digital filter in an electronic unit having a digital signal processor. The digital filter has a plurality of reconfigurable filter sections to achieve a desired bandwidth characteristic between a first characteristic with a first cutoff frequency and a second characteristic with a second cutoff frequency. A first set of filter coefficients is determined for providing the first characteristic. A second set of filter coefficients is determined for providing the second characteristic. A third set of filter coefficients is determined for providing a third characteristic having a third cutoff frequency between the first and second cutoff frequencies.

Abstract: A method is provided of slewing a bandwidth characteristic of a digital filter within a range between a first bandwidth characteristic and a second bandwidth characteristic. The digital filter includes a plurality of cascaded filter sections, each filter section being comprised of a second order filter having coefficients a1, a2, b0, b1, and b2. An index value is determined for identifying a desired bandwidth characteristic within the range. Values are interpolated for the coefficient values for the a1 and a2 coefficients of a respective filter section in response to the index value. Coefficient values are derived for the b0, b1, and b2 coefficients in response to the coefficient values for the a1 and a2 coefficients such that the b0, b1, and b2 coefficient values provide a matched gain for the respective filter section. The coefficient values are loaded into the respective filter section.