Abstract: Techniques for precisely controlling the composition of volatile components (such as sulfur (S), selenium (Se), and tin (Sn)) of chalcogenide semiconductors in real-time—during production of the material are provided. In one aspect, a method for forming a chalcogenide semiconductor material includes providing a S source(s) and a Se source(s); heating the S source(s) to form a S-containing vapor; heating the Se source(s) to form a Se-containing vapor; passing a carrier gas first through the S-containing vapor and then through the Se-containing vapor, wherein the S-containing vapor and the Se-containing vapor are transported via the carrier gas to a sample; and contacting the S-containing vapor and the Se-containing vapor with the sample under conditions sufficient to form the chalcogenide semiconductor material. A multi-chamber processing apparatus is also provided.

Abstract: A plasma processing apparatus for reactive ion etching a wafer includes a wafer chuck within a chamber and an electrode for creating a plasma within the chamber above the wafer chuck. There is provided on the wafer chuck a semiconductor wafer having a p? layer and an n+ layer. Both p? and n+ layers have exposed peripheral edges. Also provided is an anode comprising the plasma, a cathode comprising the wafer chuck, and a gate comprising the peripheral edge of the n+ layer. A coating layer is formed on a portion of the peripheral edge of the n+ layer. The coating layer reduces charge flow to a portion of the semiconductor wafer below the coating layer.

Abstract: Techniques for precisely controlling the composition of volatile components (such as sulfur (S), selenium (Se), and tin (Sn)) of chalcogenide semiconductors in real-time—during production of the material are provided. In one aspect, a method for forming a chalcogenide semiconductor material includes providing a S source(s) and a Se source(s); heating the S source(s) to form a S-containing vapor; heating the Se source(s) to form a Se-containing vapor; passing a carrier gas first through the S-containing vapor and then through the Se-containing vapor, wherein the S-containing vapor and the Se-containing vapor are transported via the carrier gas to a sample; and contacting the S-containing vapor and the Se-containing vapor with the sample under conditions sufficient to form the chalcogenide semiconductor material. A multi-chamber processing apparatus is also provided.

Abstract: Techniques for precisely controlling the composition of volatile components (such as sulfur (S), selenium (Se), and tin (Sn)) of chalcogenide semiconductors in real-time—during production of the material are provided. In one aspect, a method for forming a chalcogenide semiconductor material includes providing a S source(s) and a Se source(s); heating the S source(s) to form a S-containing vapor; heating the Se source(s) to form a Se-containing vapor; passing a carrier gas first through the S-containing vapor and then through the Se-containing vapor, wherein the S-containing vapor and the Se-containing vapor are transported via the carrier gas to a sample; and contacting the S-containing vapor and the Se-containing vapor with the sample under conditions sufficient to form the chalcogenide semiconductor material. A multi-chamber processing apparatus is also provided.

Abstract: Structures including a spin torque transfer magnetic tunnel junction (MTJ) stack and methods for fabricating same. A first contact is coupled with a first portion of a free layer of the MTJ stack, and a second contact is coupled with a second portion of the free layer of the MTJ stack. The free layer is laterally arranged between the first contact and the second contact.

Abstract: Structures including a spin torque transfer magnetic tunnel junction (MTJ) stack and methods for fabricating same. A first contact is coupled with a first portion of a free layer of the MTJ stack, and a second contact is coupled with a second portion of the free layer of the MTJ stack. The free layer is laterally arranged between the first contact and the second contact.

Abstract: Techniques for precisely controlling the composition of volatile components (such as sulfur (S), selenium (Se), and tin (Sn)) of chalcogenide semiconductors in real-time—during production of the material are provided. In one aspect, a method for forming a chalcogenide semiconductor material includes providing a S source(s) and a Se source(s); heating the S source(s) to form a S-containing vapor; heating the Se source(s) to form a Se-containing vapor; passing a carrier gas first through the S-containing vapor and then through the Se-containing vapor, wherein the S-containing vapor and the Se-containing vapor are transported via the carrier gas to a sample; and contacting the S-containing vapor and the Se-containing vapor with the sample under conditions sufficient to form the chalcogenide semiconductor material. A multi-chamber processing apparatus is also provided.

Abstract: Techniques for precisely controlling the composition of volatile components (such as sulfur (S), selenium (Se), and tin (Sn)) of chalcogenide semiconductors in real-time—during production of the material are provided. In one aspect, a method for forming a chalcogenide semiconductor material includes providing a S source(s) and a Se source(s); heating the S source(s) to form a S-containing vapor; heating the Se source(s) to form a Se-containing vapor; passing a carrier gas first through the S-containing vapor and then through the Se-containing vapor, wherein the S-containing vapor and the Se-containing vapor are transported via the carrier gas to a sample; and contacting the S-containing vapor and the Se-containing vapor with the sample under conditions sufficient to form the chalcogenide semiconductor material. A multi-chamber processing apparatus is also provided.

Abstract: Embodiments of the present invention provide a structure and method for fabrication of deep trenches in semiconductor-on-insulator structures. An upper portion of the deep trench cavity is formed to expose a sidewall of the buried insulator layer. A protective layer is disposed on the sidewall of the buried insulator layer. Then, the cavity is extended into the bulk substrate. The protective layer prevents over etch of the buried insulator layer during this process. The protective layer is then partially removed, such that the semiconductor-on-insulator (SOI) layer sidewall is exposed. The trench is then filled with a conductive fill material, such as polysilicon. The protection of the buried insulator (BOX) layer allows the trenches to be placed closer together while reducing the risk of a short circuit due to over etch, thereby increasing circuit density and product yield.

Abstract: A method for preventing buckling in a substrate using a tensile hard mask is provided. The method may include forming a mask over a substrate, the hard mask including a first area having a pattern for forming a plurality of openings and an adjacent second area free of openings, and the hard mask includes a tensile stress therein. The hard mask may be used to form the plurality of openings in the substrate. Partially eroding the hard mask leaves the substrate with the plurality of openings therein and a substantially planar surface, having diminished buckling.

Abstract: A method for preventing buckling in a substrate using a tensile hard mask is provided. The method may include forming a mask over a substrate, the hard mask including a first area having a pattern for forming a plurality of openings and an adjacent second area free of openings, and the hard mask includes a tensile stress therein. The hard mask may be used to form the plurality of openings in the substrate. Partially eroding the hard mask leaves the substrate with the plurality of openings therein and a substantially planar surface, having diminished buckling.

Abstract: A plasma processing apparatus for reactive ion etching a wafer includes a wafer chuck within a chamber and an electrode for creating a plasma within the chamber above the wafer chuck. There is provided on the wafer chuck a semiconductor wafer having a p? layer and an n+ layer. Both p? and n+ layers have exposed peripheral edges. Also provided is an anode comprising the plasma, a cathode comprising the wafer chuck, and a gate comprising the peripheral edge of the n+ layer. A coating layer is formed on a portion of the peripheral edge of the n+ layer. The coating layer reduces charge flow to a portion of the semiconductor wafer below the coating layer.

Abstract: Methods of forming polysilicon-filled deep trenches for an eDRAM are provided. The method may include forming a plurality of polysilicon-filled deep trenches in a substrate. An epitaxy-retarding dopant is introduced to an upper portion of the trenches. A plurality of fins are then formed over the substrate, with each polysilicon-filled deep trench including a corresponding fin extending thereover. A silicon layer is epitaxially grown over at least the polysilicon-filled deep trench. The dopant in the polysilicon-filled deep trenches acts to control the epitaxial growth of the silicon layer, diminishing or preventing shorts to adjacent fins and/or deep trenches at advanced technology nodes.

Abstract: One aspect of the disclosure relates to a contact within a dielectric layer to a source/drain terminal of a field-effect-transistor (FET). The contact may include: a titanium-tantalum-silicide at a surface of the source/drain terminal; a barrier layer over the titanium-tantalum-silicide; and a metal over the barrier layer and extending to a top surface of the dielectric layer.

Abstract: Embodiments of the present invention provide a structure and method for fabrication of deep trenches in semiconductor-on-insulator structures. An upper portion of the deep trench cavity is formed to expose a sidewall of the buried insulator layer. A protective layer is disposed on the sidewall of the buried insulator layer. Then, the cavity is extended into the bulk substrate. The protective layer prevents over etch of the buried insulator layer during this process. The protective layer is then partially removed, such that the semiconductor-on-insulator (SOI) layer sidewall is exposed. The trench is then filled with a conductive fill material, such as polysilicon. The protection of the buried insulator (BOX) layer allows the trenches to be placed closer together while reducing the risk of a short circuit due to over etch, thereby increasing circuit density and product yield.

Abstract: A method of reactive ion etching a wafer includes providing a plasma processing tool having a wafer chuck within a chamber and an electrode creating a plasma above the wafer chuck. There is provided on the wafer chuck a semiconductor wafer having a p? layer and an n+ layer. Both p? and n+ layers have exposed peripheral edges during plasma etching to electrically form with the plasma processing tool during plasma etching a diode having an anode comprising the plasma, a cathode comprising the wafer chuck and a gate comprising the n+ layer peripheral edge. The method includes controlling charge flow during plasma etching adjacent the peripheral edge of the n+ layer to reduce charge transport into, within and out of the semiconductor wafer adjacent the n+ layer edge, and reactive ion etching the n+ layer while controlling the charge flow along the edge of the n+ layer.

Abstract: Techniques for precisely controlling the composition of volatile components (such as sulfur (S), selenium (Se), and tin (Sn)) of chalcogenide semiconductors in real-time—during production of the material are provided. In one aspect, a method for forming a chalcogenide semiconductor material includes providing a S source(s) and a Se source(s); heating the S source(s) to form a S-containing vapor; heating the Se source(s) to form a Se-containing vapor; passing a carrier gas first through the S-containing vapor and then through the Se-containing vapor, wherein the S-containing vapor and the Se-containing vapor are transported via the carrier gas to a sample; and contacting the S-containing vapor and the Se-containing vapor with the sample under conditions sufficient to form the chalcogenide semiconductor material. A multi-chamber processing apparatus is also provided.

Abstract: Techniques for precisely controlling the composition of volatile components (such as sulfur (S), selenium (Se), and tin (Sn)) of chalcogenide semiconductors in real-time—during production of the material are provided. In one aspect, a method for forming a chalcogenide semiconductor material includes providing a S source(s) and a Se source(s); heating the S source(s) to form a S-containing vapor; heating the Se source(s) to form a Se-containing vapor; passing a carrier gas first through the S-containing vapor and then through the Se-containing vapor, wherein the S-containing vapor and the Se-containing vapor are transported via the carrier gas to a sample; and contacting the S-containing vapor and the Se-containing vapor with the sample under conditions sufficient to form the chalcogenide semiconductor material. A multi-chamber processing apparatus is also provided.

Abstract: Techniques for precisely controlling the composition of volatile components (such as sulfur (S), selenium (Se), and tin (Sn)) of chalcogenide semiconductors in real-time—during production of the material are provided. In one aspect, a method for forming a chalcogenide semiconductor material includes providing a S source(s) and a Se source(s); heating the S source(s) to form a S-containing vapor; heating the Se source(s) to form a Se-containing vapor; passing a carrier gas first through the S-containing vapor and then through the Se-containing vapor, wherein the S-containing vapor and the Se-containing vapor are transported via the carrier gas to a sample; and contacting the S-containing vapor and the Se-containing vapor with the sample under conditions sufficient to form the chalcogenide semiconductor material. A multi-chamber processing apparatus is also provided.

Abstract: Techniques for precisely controlling the composition of volatile components (such as sulfur (S), selenium (Se), and tin (Sn)) of chalcogenide semiconductors in real-time—during production of the material are provided. In one aspect, a method for forming a chalcogenide semiconductor material includes providing a S source(s) and a Se source(s); heating the S source(s) to form a S-containing vapor; heating the Se source(s) to form a Se-containing vapor; passing a carrier gas first through the S-containing vapor and then through the Se-containing vapor, wherein the S-containing vapor and the Se-containing vapor are transported via the carrier gas to a sample; and contacting the S-containing vapor and the Se-containing vapor with the sample under conditions sufficient to form the chalcogenide semiconductor material. A multi-chamber processing apparatus is also provided.