Patents by Inventor Sun-jin Lee

Sun-jin Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250098140
    Abstract: The present disclosure discloses a capacitorless 3D DRAM device including a write bit line extending in a vertical direction, a write word line extending in a horizontal direction, a write transistor connected to the write bit line and the write word line, and defined to include a first channel material layer, a first gate insulating layer, and a portion of the write word line, a read bit line extending in the vertical direction, a read word line extending in the horizontal direction, and a read transistor connected to the read bit line and the read word line.
    Type: Application
    Filed: October 23, 2023
    Publication date: March 20, 2025
    Inventors: Cheol Seong Hwang, Sun Jin Lee, Seo Young Jang
  • Publication number: 20150027883
    Abstract: A sputtering apparatus includes a plurality of targets arranged to face each other and a magnetic unit producing magnetic field. A space between the targets is disposed on a substrate on which a deposition is being made during a sputtering process. The magnetic unit includes at least two magnet members. The space between the targets is surrounded by a space between the at least two magnet members. Each of the magnet members includes at least one first magnet and at least one second magnet separated from each other with an interval.
    Type: Application
    Filed: December 17, 2013
    Publication date: January 29, 2015
    Inventors: Hun Kim, Jin-Woo Park, Ou-Hyen Kim, Sun-Jin Lee
  • Patent number: 8455360
    Abstract: A method for fabricating a storage node of a semiconductor device includes forming a sacrificial dielectric pattern with a storage node hole on a substrate, forming a support layer on the sacrificial dielectric pattern, forming a storage node, supported by the support layer, in the storage node hole, performing a full dip-out process to expose the outer wall of the storage node, and performing a cleaning process for removing or reducing a bridge-causing material formed on the surface of the support layer.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: June 4, 2013
    Assignee: SK Hynix Inc.
    Inventors: Hyo Geun Yoon, Ji Yong Park, Sun Jin Lee
  • Publication number: 20120276711
    Abstract: A semiconductor device having a spacer with an air gap is manufactured by forming a first conductive pattern over a semiconductor substrate; forming a spacer on sidewalls of the first conductive pattern; forming a sacrifice layer on sidewall of the spacer, the sacrifice layer having a different etching selectivity with the spacer; forming a second conductive pattern to fill a space between the first conductive pattern and the first conductive pattern; and forming an air gap between the first and second conductive patterns by selectively removing the sacrifice layer.
    Type: Application
    Filed: September 25, 2011
    Publication date: November 1, 2012
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Hyo Geun YOON, Ji Yong PARK, Sun Jin LEE
  • Publication number: 20120009790
    Abstract: A method for fabricating a storage node of a semiconductor device includes forming a sacrificial dielectric pattern with a storage node hole on a substrate, forming a support layer on the sacrificial dielectric pattern, forming a storage node, supported by the support layer, in the storage node hole, performing a full dip-out process to expose the outer wall of the storage node, and performing a cleaning process for removing or reducing a bridge-causing material formed on the surface of the support layer.
    Type: Application
    Filed: March 28, 2011
    Publication date: January 12, 2012
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Hyo Geun YOON, Ji Yong PARK, Sun Jin LEE
  • Publication number: 20110156135
    Abstract: A buried gate in a semiconductor device and a method for fabricating the same are presented. The method includes: forming a gate trench in an active region of a semiconductor substrate; filling the gate trench with a barrier metal film and a metal film; recessing the metal film and the barrier metal film to form buried gate electrodes that partially fill the gate trench; recessing the barrier metal film of the buried gate electrode below the surface of the metal film; and filling an exposed part of the buried gate electrode and the gate trench with a capping film.
    Type: Application
    Filed: July 12, 2010
    Publication date: June 30, 2011
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Hyo Geun Yoon, Ji Yong Park, Sun Jin Lee
  • Publication number: 20090177320
    Abstract: Provided are a method, medium, and apparatus for docking a mobile robot.
    Type: Application
    Filed: May 21, 2008
    Publication date: July 9, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sun-jin Lee, Hyeon Myeong, Woo-yeon Jeong