Abstract: The present invention relates to a method for preparing liquid hydrocarbons via a slurry phase Fischer-Tropsch (F-T) synthesis. In particular, the present invention relates to a method for preparing liquid hydrocarbons from syngas via slurry phase F-T synthesis using a catalyst, which can prevent the decrease in catalyst activity and filter clogging due to catalyst aggregation, simultaneously with improving selectivity for C5 or higher hydrocarbons by using C7-C12 alcohols having a high boiling point as an additive for a slurry reaction solvent or recycling the same alcohol separated from by-products that are generated during the F-T reaction. Since the method of the present invention is more carbon-effective and shows improved long-term stability of a reactor, it can be effectively used in the preparation of liquid hydrocarbons.

Abstract: The present invention relates to a method for preparing liquid hydrocarbons via a slurry phase Fischer-Tropsch (F-T) synthesis. In particular, the present invention relates to a method for preparing liquid hydrocarbons from syngas via slurry phase F-T synthesis using a catalyst, which can prevent the decrease in catalyst activity and filter clogging due to catalyst aggrega-tion, simultaneously with improving selectivity for C5 or higher hydrocarbons by using C7-C12 alcohols having a high boiling point as an additive for a slurry reaction solvent or recycling the same alcohol separated from by-products that are generated during the F-T reaction. Since the method of the present invention is more carbon-effective and shows improved long-term stability of a re-actor, it can be effectively used in the preparation of liquid hydrocarbons.

Abstract: An shift circuit is used in an arithmetic unit, for shifting m-bit input data to left or in right, m being a positive integer. The shift circuit includes a latch for temporarily storing the m-bit input data and additional 2n-bit, wherein n is a positive integer; a shift logic block, receiving (m+2n)-bit data from the latch means, for providing (2n+1) number of m-bit shifted data; a sensor for generating a selection signal based on a predetermined shift condition; and a multiplexer, in response to the selection signal, for selecting one of the (2n+1) number of m-bit shifted data as an output signal of the apparatus.