Patents by Inventor Sunny Sadana

Sunny Sadana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210026604
    Abstract: Embodiments herein provide a system and a method for generating a random bit string in an Integrated Circuit. Predefined number of One-time Programmable Memory (OTPM) devices are connected in parallel with each OTPM device configured for producing a random bit-string. Current limiting circuit is connected in series with the at least two OTPM devices. Voltage source supplies a predefined voltage to the at least two OTPM devices for producing a breakdown in one of an OTPM device of the at least two OTPM devices resulting in a broken OTPM device while leaving remaining OTPM devices of the at least two OTPM devices unbroken. The random bit string is generated through at least one of the broken OTPM device and a remaining unbroken OTPM device of the at least two OTPM devices.
    Type: Application
    Filed: March 20, 2019
    Publication date: January 28, 2021
    Inventors: Udayan Ganguly, Sunny Sadana, Sanjay Ashwin Lele
  • Patent number: 9876019
    Abstract: Methods of producing integrated circuits and integrated circuits produced by those methods are provided. In an exemplary embodiment, a method of producing an integrated circuit includes forming first and second shallow trench isolations within a substrate, where the first and second shallow trench isolations have an initial shallow trench height. A base well is formed in the substrate, where the base well is positioned between the first and second shallow trench isolations. A gate dielectric is formed overlying the base well, and a floating gate is formed overlying the gate dielectric. An initial shallow trench height is reduced to a reduced shallow trench height shorter than the initial shallow trench height after the floating gate is formed.
    Type: Grant
    Filed: July 13, 2016
    Date of Patent: January 23, 2018
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Xiong Zhang, Sunny Sadana, Yudi Setiawan, Yoke Leng Lim, Siow Lee Chwa
  • Publication number: 20180019249
    Abstract: Methods of producing integrated circuits and integrated circuits produced by those methods are provided. In an exemplary embodiment, a method of producing an integrated circuit includes forming first and second shallow trench isolations within a substrate, where the first and second shallow trench isolations have an initial shallow trench height. A base well is formed in the substrate, where the base well is positioned between the first and second shallow trench isolations. A gate dielectric is formed overlying the base well, and a floating gate is formed overlying the gate dielectric. An initial shallow trench height is reduced to a reduced shallow trench height shorter than the initial shallow trench height after the floating gate is formed.
    Type: Application
    Filed: July 13, 2016
    Publication date: January 18, 2018
    Inventors: Xiong Zhang, Sunny Sadana, Yudi Setiawan, Yoke Leng Lim, Siow Lee Chwa