Patents by Inventor Sunpei Yamazaki

Sunpei Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6914642
    Abstract: In an active matrix display device, a circuit including at least five thin film transistors (TFTs) which are provided with an approximately M-shaped semiconductor region for a single pixel electrode and gate lines and a capacitances line which cross the M-shaped semiconductor region, is used as a switching element. Each of the TFT have offset regions and lightly doped drain (LDD) regions. Then, by supplying a selection signal to the gate lines, the TFTs are operated, thereby writing data to the pixel, while a suitable voltage is supplied to the capacitance line, a channel is formed thereunder and it becomes a capacitor. Thus the amount of discharge from the pixel electrode is reduced by the capacitor.
    Type: Grant
    Filed: June 12, 2002
    Date of Patent: July 5, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Sunpei Yamazaki, Jun Koyama, Yasuhiko Takemura
  • Publication number: 20040171237
    Abstract: When the CW laser oscillator is employed in the manufacturing process of the semiconductor device, it is expected to obtain the device of high performance. However, the CW oscillator provides only a small beam spot and forms an inferior crystalline region when it is scanned on the semiconductor film. It is necessary to minimize such an inferior crystalline region because it gives a problem in terms of high integration of the semiconductor element. In view of the problem, the present invention is to form a long crystalline region as suppressing the formation of the inferior crystalline region by irradiating the fundamental wave with the harmonic supplementarily (refer to FIG. 1).
    Type: Application
    Filed: February 27, 2004
    Publication date: September 2, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koichiro Tanaka, Sunpei Yamazaki
  • Patent number: 6417896
    Abstract: In an active matrix display device, a circuit including at least five thin film transistors (TFTs) which are provided with an approximately M-shaped semiconductor region for a single pixel electrode and gate lines and a capacitances line which cross the M-shaped semiconductor region, is used as a switching element. Each of the TFT have offset regions and lightly doped drain (LDD) regions. Then, by supplying a selection signal to the gate lines, the TFTs are operated, thereby writing data to the pixel, while a suitable voltage is supplied to the capacitance line, a channel is formed thereunder and it becomes a capacitor. Thus the amount of discharge from the pixel electrode is reduced by the capacitor.
    Type: Grant
    Filed: November 25, 1997
    Date of Patent: July 9, 2002
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Sunpei Yamazaki, Jun Koyama, Yasuhiko Takemura
  • Patent number: 5729308
    Abstract: In an active matrix display device, a circuit including at least five thin film transistors (TFTs) which are provided with an approximately M-shaped semiconductor region for a single pixel electrode and gate lines and a capacitances line which cross the M-shaped semiconductor region, is used as a switching element. Each of the TFT have offset regions and lightly doped drain (LDD) regions. Then, by supplying a selection signal to the gate lines, the TFTs are operated, thereby writing data to the pixel, while a suitable voltage is supplied to the capacitance line, a channel is formed thereunder and it becomes a capacitor. Thus the amount of discharge from the pixel electrode is reduced by the capacitor.
    Type: Grant
    Filed: February 15, 1996
    Date of Patent: March 17, 1998
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Sunpei Yamazaki, Jun Koyama, Yasuhiko Takemura