Abstract: Relevance optimized representative content associated with a data storage system is disclosed. One example is a system including a data summarization module, a clustering module, and a representative content selection module. The data summarization module associates, via a processor, each data object in a storage system with a derived data object. The clustering module determines clusters of similar data objects based on a similarity between associated derived data objects, and selects a representative data object for each determined cluster. The representative content selection module selects representative content associated with the storage system, where the representative content is based on the data objects, the derived data objects, and the representative data objects, and relevance optimizes of the selected representative content to an analytics application.

Abstract: An example implementation may relate to an apparatus that may identify data content of interest from data in buffers, and may store index entries representing the identified data content in a hierarchical index having different performance levels. The apparatus may include a priority manager that maintains an index scoreboard that tracks where index entries are to be stored among the different performance levels of the hierarchical index based on predetermined polices that prioritize data content of interest or functions that use data content of interest.

Abstract: Example implementations relate to performing computations using provenance data. An example implementation includes storing first lineage data of a first dataset and provenance data of an application operating on the first dataset in a storage system. A computing resource may determine whether second lineage data of a second dataset meets a similarity criterion with the first lineage data of the first dataset. A computation on the second dataset may be performed using the provenance data of the application, and an insight of the second dataset may be generated from the performed computation.

Abstract: Examples disclosed herein relate to data provisioning for an analytical process based on lineage metadata. In an example, a value of a parameter related to execution of an analytical process on a remote hub device may be determined based on lineage metadata stored on an edge device, wherein the analytical process is part of an analytical workflow that may be implemented at least in part on the edge device and the remote hub device. In response to a determination that the value of the parameter is above a predefined threshold, the edge device may provide to the remote hub device, input data for a future execution of the analytical process in advance of execution of the analytical process on the remote hub device without a request for the input data by the remote hub device.

Abstract: Examples disclosed herein relate to relocation of an analytical process based on lineage metadata. In an example, a determination may be made, based on lineage metadata on a hub device, whether relocating an analytical process from the hub device to a remote edge device reduces execution time of the analytical process, wherein the analytical process is part of an analytical workflow that is implemented at least in part on the hub device and the remote edge device. In response to a determination that relocating the analytical process from the hub device to the remote edge device reduces the execution time of the analytical process, the analytical process may be relocated from the hub device to the remote edge device.

Abstract: Examples disclosed herein relate to re-execution of an analytical process based on lineage metadata. In an example, a determination may be made on a hub device that an analytical process previously executed on a remote edge device is to be re-executed on the hub device, wherein the analytical process is part of an analytical workflow that is implemented at least in part on the hub device and the remote edge device. In response to the determination, a storage location of input data for re-executing the analytical process may be identified based on lineage metadata stored on the hub device, and input data may be acquired from the storage location.

Abstract: Example implementations relate to a storage memory direct access (SMDA) provider. The SMDA provider may pin a storage memory region to a memory address of a consumer machine, the storage memory region corresponding to a storage range of a storage device requested by the consumer machine. The SMDA provider may atomically commit data in the storage memory region accessed by the consumer machine via the memory address.

Abstract: Some examples relate to associating an insight with data. In an example, data may be received. A determination may be made that data type of the data is same as compared to an earlier data. An insight generated from the earlier data may be identified, wherein the insight may represent intermediate or resultant data generated upon processing of the earlier data by an analytics function, and wherein during generation metadata is associated with the insight. An analytics function used for generating the insight may be identified.

Abstract: A method, system, and/or computer program product stores and retrieves payload data using a ternary content addressed memory (TCAM) hybrid memory. TCAM data is transmitted to a context masking device. The TCAM data identifies a type of payload data, and the context masking device masks the TCAM data with a context mask to create a masked TCAM data. One or more processors append the masked TCAM to payload data to create multiple stored units of TCAM-identified payload data in a location addressable store (LAS). The processor(s) receive a request for data. The request includes a masked request TCAM data that identifies a content and context of requested data. An exclusive OR (XOR) chip identifies relevant payload data within the LAS that are within a predefined Hamming distance of the masked request TCAM data. The processor(s) return the relevant payload data within the LAS to the requester.

Abstract: A system comprises a hashing logic, which executes instructions to convert raw data into a first logical address and payload data, where the first logical address describes metadata about the payload data. A hardware translation unit executes instructions to translate the first logical address into a first physical address on a storage device. A hardware load/storage unit stores the first logical address and the payload data at the first physical address on the storage device. A content addressable store is associated with a reference to the logical addressed data in this location addressable high dimensional store, where the content addressable store is searched for the desired content word using at least one temporal attribute to retrieve the corresponding references with low latency. A hardware exclusive OR (XOR) unit compares two logical address vectors to derive a Hamming distance between the two logical address vectors.

Abstract: A system comprises a hashing logic, which executes instructions to convert raw data into a first logical address and payload data, where the first logical address describes metadata about the payload data. A hardware translation unit executes instructions to translate the first logical address into a first physical address on a storage device. A hardware load/storage unit stores the first logical address and the payload data at the first physical address on the storage device. A content addressable store is associated with a reference to the logical addressed data in this location addressable high dimensional store, where the content addressable store is searched for the desired content word using at least one temporal attribute to retrieve the corresponding references with low latency. A hardware exclusive OR (XOR) unit compares two logical address vectors to derive a Hamming distance between the two logical address vectors.

Abstract: A content addressable memory system, method and computer program product is described. The memory system comprises a location addressable store having data identified by location and multiple levels of content addressable stores each holding ternary content words. The content words are associated with references to data in the location addressable store and the content words containing at least one next entry bit for sorting content words in a physical ordered sequence to create content ordered memory. The content store levels might be implemented using different technologies that have different performance, capacity, and cost attributes. The memory system includes a content based cache for improved performance and a content addressable memory management unit for managing memory access operations and virtual memory addressing.

Abstract: A method, system, and/or computer program product stores and retrieves payload data using a ternary content addressed memory (TCAM) hybrid memory. TCAM data is transmitted to a context masking device. The TCAM data identifies a type of payload data, and the context masking device masks the TCAM data with a context mask to create a masked TCAM data. One or more processors append the masked TCAM to payload data to create multiple stored units of TCAM-identified payload data in a location addressable store (LAS). The processor(s) receive a request for data. The request includes a masked request TCAM data that identifies a content and context of requested data. An exclusive OR (XOR) chip identifies relevant payload data within the LAS that are within a predefined Hamming distance of the masked request TCAM data. The processor(s) return the relevant payload data within the LAS to the requester.

Abstract: A content addressable memory system, method and computer program product is described. The memory system comprises a location addressable store having data identified by location and multiple levels of content addressable stores each holding ternary content words. The content words are associated with references to data in the location addressable store and the content words containing at least one next entry bit for sorting content words in a physical ordered sequence to create content ordered memory. The content store levels might be implemented using different technologies that have different performance, capacity, and cost attributes. The memory system includes a content based cache for improved performance and a content addressable memory management unit for managing memory access operations and virtual memory addressing.

Abstract: A system comprises a hashing logic, which executes instructions to convert raw data into a first logical address and payload data, where the first logical address describes metadata about the payload data. A hardware translation unit executes instructions to translate the first logical address into a first physical address on a storage device. A hardware load/storage unit stores the first logical address and the payload data at the first physical address on the storage device. A content addressable store is associated with a reference to the logical addressed data in this location addressable high dimensional store, where the content addressable store is searched for the desired content word using at least one temporal attribute to retrieve the corresponding references with low latency. A hardware exclusive OR (XOR) unit compares two logical address vectors to derive a Hamming distance between the two logical address vectors.

Abstract: Ternary content addressable memory (TCAM) structures and methods of use are disclosed. The memory architecture includes one or more ternary content addressable memory (TCAM) fields, and control logic that applies progressively discriminating data-masking and scores a closeness of a match based on matched and mismatched bits.

Abstract: A scoped search engine is disclosed. The scoped search engine includes a memory unit storing reference data records. The scoped search engine also includes a data comparison unit that searches the reference data records using different searches. The scoped search engine further includes a match analysis unit that combines result data from the different searches and determines a scope for a subsequent search based on the combined result data.

Abstract: A method and apparatus are provided for pre-allocating non-initialized blocks of data in a file system. Each file contains a primary i-node to maintain file metadata. A secondary i-node is created and associated with the primary i-node. The secondary i-node contains non-initialized data blocks, and the primary i-node contains valid and initialized data blocks. A write operation to a non-initialized data block in a pre-allocated range stored in the secondary i-node directs the data block from the secondary i-node to the primary i-node.

Abstract: A content addressable memory system, method and computer program product is described. The memory system comprises a location addressable store having data identified by location and multiple levels of content addressable stores each holding ternary content words. The content words are associated with references to data in the location addressable store. The content store levels might be implemented using different technologies that have different performance, capacity, and cost attributes. The memory system includes a content based cache for improved performance and a content addressable memory management unit for managing memory access operations and virtual memory addressing.

Abstract: A content addressable memory system, method and computer program product is described. The memory system comprises a location addressable store having data identified by location and multiple levels of content addressable stores each holding ternary content words. The content words are associated with references to data in the location addressable store. The content store levels might be implemented using different technologies that have different performance, capacity, and cost attributes. The memory system includes a content based cache for improved performance and a content addressable memory management unit for managing memory access operations and virtual memory addressing.