Abstract: A display may have display layers that form an array of pixels. An angle-of-view adjustment layer may overlap the display layers. The angle-of-view adjustment layer may include an array of adjustable light blocking structures formed from electrochromic material. The electrochromic material may be interposed between first and second electrode layers. When it is desired to operate the display in a private viewing mode, control circuitry may apply a current to the first and second electrodes that causes the electrochromic material to become more opaque, thereby restricting the angle of view of the display. When it is desired to operate the display in a public viewing mode, control circuitry may apply a current to the first and second electrodes that causes the electrochromic material to become more transparent, thereby opening up the angle of view of the display.

Abstract: In devices with flexible displays, multilayer adhesive stacks may be included. A multilayer adhesive may attach a flexible display panel to the display cover layer in an electronic device. Including multiple layers of adhesive in the adhesive stack (as opposed to a single layer) provides more degrees of freedom for the tuning and optimization of the properties of the adhesive stack. The multilayer adhesive stack therefore has better performance than if only a single layer of adhesive is used. The multilayer adhesive stack may include one or more layers of soft adhesive, hard adhesive, hard elastomer, hard polymer, and/or glass to optimize the mechanical and optical performance of the multilayer adhesive stack. Soft adhesive layers may be included to optimize lateral decoupling (e.g., during folding and unfolding) of the adhesive stack. Harder layers may be included to provide rigidity and prevent denting during impact events.

Abstract: An electronic device includes display layers such as liquid crystal display layers and a backlight unit that provides illumination for the display layers. The backlight unit includes light-emitting diodes that emit light into the edge of a light guide film. To minimize the inactive area of the display, the light-emitting diodes are tightly spaced to approximate a line light source instead of point light sources. Color and/or luminance compensation layers are incorporated at various locations within the backlight structures to ensure that the backlight provided to the display layers is homogenous. A thin-film transistor layer of the display is coupled to a printed circuit board by a flexible printed circuit. The flexible printed circuit has additional solder mask layers to improve robustness, encapsulation, and traces with a varying pitch.

Abstract: An electronic device may include display layers such as liquid crystal display layers and a backlight unit that provides illumination for the display layers. The backlight unit may include light-emitting diodes that emit light into the edge of a light guide film. To minimize the inactive area of the display, the light-emitting diodes may be tightly spaced to approximate a line light source instead of point light sources. Color and/or luminance compensation layers may be incorporated at various locations within the backlight structures to ensure that the backlight provided to the display layers is homogenous. A thin-film transistor layer of the display may be coupled to a printed circuit board by a flexible printed circuit. The flexible printed circuit may have additional solder mask layers to improve robustness, may include encapsulation, and may have traces with a varying pitch.

Abstract: A display may have a liquid crystal layer sandwiched between a thin-film transistor layer and a color filter layer. An upper polarizer may be placed on top of the thin-film transistor layer. A lower polarizer may be placed under the color filter layer. Components may be bonded to bond pads on the inner surface of the thin-film transistor layer using anisotropic conductive film. Bond quality may be assessed by probing probe pads that are coupled to the bond pads or by visually inspecting the bond pads through the thin-film transistor layer. Opaque masking material in the inactive area may be provided with openings to accommodate the bond pads. Additional opaque masking material may be placed on the underside of the upper polarizer and on the upper surface of the thin-film transistor layer to block the openings from view following visual inspection.

Abstract: A display may have a liquid crystal layer sandwiched between a thin-film transistor layer and a color filter layer. An upper polarizer may be placed on top of the thin-film transistor layer. A lower polarizer may be placed under the color filter layer. Components may be bonded to bond pads on the inner surface of the thin-film transistor layer using anisotropic conductive film. Bond quality may be assessed by probing probe pads that are coupled to the bond pads or by visually inspecting the bond pads through the thin-film transistor layer. Opaque masking material in the inactive area may be provided with openings to accommodate the bond pads. Additional opaque masking material may be placed on the underside of the upper polarizer and on the upper surface of the thin-film transistor layer to block the openings from view following visual inspection.

Abstract: A display characterization system may be used to gather display flatness data and light leakage data from a display. The display characterization system may include a camera system that includes flatness measurement cameras and a light leakage measurement camera. The camera system may include a light guide plate covered with a patterned opaque layer or other planar light-emitting structures for emitting patterned light that is reflected from the display. A controller may use the light leakage measurement camera to capture light leakage data while a display backlight unit is on, a reference light source is on, and the planar light-emitting structures are not emitting light. The controller may use the flatness measurement cameras to capture flatness data while the backlight unit is off, the reference light source is off, and the light-emitting structures are reflecting light from the display.

Abstract: Electronic devices may be provided with displays that have polarizers. A polarizer may be provided with an unpolarized strip. The unpolarized strip may extend across the width of the polarizer and may overlap a light-based component such as a camera that is located in an inactive border area of a display. The polarizer may have a polarizer layer formed form a polymer with a dichroic dye. A strip-shaped opening may be formed in the polarizer layer by cutting out a strip of the polarizer layer with a laser cutting tool or other equipment, a strip of unpolarized material may be formed in the polarizer layer using chemical bleaching, or light-based bleaching techniques may be used to form an unpolarized strip in the polarizer layer.

Abstract: A method for etching a dielectric layer is provided. A patterned mask with mask features is formed over a dielectric layer. The mask has isolated areas and dense areas of the mask features. The mask is trimmed by a plurality of cycles, where each cycle includes depositing a deposition layer, and selectively etching the deposition layer and the patterned mask. The selective etching selectively trims the isolated areas of the mask with respect to the dense areas of the mask. The dielectric layer is etched using the thus trimmed mask. The mask is removed.

Abstract: A method for etching a dielectric layer is provided. A patterned mask with mask features is formed over a dielectric layer. The mask has isolated areas and dense areas of the mask features. The mask is trimmed by a plurality of cycles, where each cycle includes depositing a deposition layer, and selectively etching the deposition layer and the patterned mask. The selective etching selectively trims the isolated areas of the mask with respect to the dense areas of the mask. The dielectric layer is etched using the thus trimmed mask. The mask is removed.

Abstract: A method for etching a dielectric layer is provided. A patterned mask with mask features is formed over a dielectric layer. The mask has isolated areas and dense areas of the mask features. The mask is trimmed by a plurality of cycles, where each cycle includes depositing a deposition layer, and selectively etching the deposition layer and the patterned mask. The selective etching selectively trims the isolated areas of the mask with respect to the dense areas of the mask. The dielectric layer is etched using the thus trimmed mask. The mask is removed.

Abstract: A method for etching a dielectric layer disposed below an antireflection layer (ARL) is provided. The method comprises (a) forming a patterned mask with mask features over the ARL, the mask having isolated areas and dense areas of the mask features, (b) trimming and opening, and (c) etching the dielectric layer using the trimmed mask. The trimming and opening comprises a plurality of cycles, where each cycle includes (b1) a trim-etch phase which etches the ARL in a bottom of the mask features and selectively trims the isolated areas of the mask with respect to the dense areas, and (b2) a deposition-etch phase which deposits a deposition layer on the mask while further etching the ARL in the bottom of the mask features. The trimming and opening result in a net trimming of the mask in the isolated areas.

Abstract: A method for etching a dielectric layer is provided. A patterned mask with mask features is formed over a dielectric layer. The mask has isolated areas and dense areas of the mask features. The mask is trimmed by a plurality of cycles, where each cycle includes depositing a deposition layer, and selectively etching the deposition layer and the patterned mask. The selective etching selectively trims the isolated areas of the mask with respect to the dense areas of the mask. The dielectric layer is etched using the thus trimmed mask. The mask is removed.

Abstract: A method for etching a dielectric layer disposed below an antireflection layer (ARL) is provided. The method comprises (a) forming a patterned mask with mask features over the ARL, the mask having isolated areas and dense areas of the mask features, (b) trimming and opening, and (c) etching the dielectric layer using the trimmed mask. The trimming and opening comprises a plurality of cycles, where each cycle includes (b1) a trim-etch phase which etches the ARL in a bottom of the mask features and selectively trims the isolated areas of the mask with respect to the dense areas, and (b2) a deposition-etch phase which deposits a deposition layer on the mask while further etching the ARL in the bottom of the mask features. The trimming and opening result in a net trimming of the mask in the isolated areas.