Patents by Inventor Suraj Das

Suraj Das has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12596571
    Abstract: One or more embodiments of the present disclosure relate to receiving application data indicative of a plurality of runnables corresponding to a computing application. Additionally, one or more embodiments may relate to generating, based at least on the application data, an execution schedule for execution of the plurality of runnables using a plurality of compute engines. The execution schedule may include one or more commands corresponding to one or more timing fences. The one or more timing fences may dictate a timing and order of execution between at least a first runnable and a second runnable of the plurality of runnables.
    Type: Grant
    Filed: September 2, 2022
    Date of Patent: April 7, 2026
    Assignee: NVIDIA CORPORATION
    Inventors: Ian Tramble, Akash Bellubbi, Ashutosh Tadkase, Peter Boonstoppel, Suraj Das, Ranvijay Singh, Sever Topan, Albert Davies, Linda Xiong, Sharat Janapareddy, Ashkan Vafaee, John Lore, Ian Howson
  • Publication number: 20250242242
    Abstract: Embodiments of the present disclosure relate to hardware-in-loop (HIL) ego-machine simulation. In various examples, one or more real-world ego-machine hardware components are integrated with a simulated or emulated environment, such as a virtual digital twin ego-machine cockpit, for testing or other use cases. HIL ego-machine simulation may thus subject the one or more hardware components to simulated realistic data and interactions the hardware components would experience in its intended real-world operational environment. Therefore, various aspects involve the use of simulated functionality and real-world ego-machine hardware to create and/or update a virtual representation of an ego-machine that closely resembles its real-world counterpart, which improves the accuracy of simulation technologies.
    Type: Application
    Filed: January 25, 2024
    Publication date: July 31, 2025
    Inventors: Parag MEHENDALE, Issac Mark Rand Simha, Mingyang Zhao, Damien Fagnou, Suraj Das, Ritaank Tiwari
  • Publication number: 20250165288
    Abstract: One or more embodiments of the present disclosure relate to generating a combined execution schedule based at least on inserting, in a timing bubble of a first execution schedule, a second execution schedule. In some embodiments, the second execution schedule may correspond to one or more runnables being executed in a “shadow mode,” where the outputs of the runnables do not directly affect the operations or control of the underlying system. Further, the present disclosure relates to executing, by a plurality of compute engines based at least on the combined execution schedule, a first computing application corresponding to the first execution schedule and a second computing application corresponding to the second execution schedule.
    Type: Application
    Filed: November 16, 2023
    Publication date: May 22, 2025
    Inventors: Albert DAVIES, Ashutosh TADKASE, Akash BELLUBBI, Suraj DAS, Alex WATERMAN, Ramesh MYLAVARAPU
  • Publication number: 20240296068
    Abstract: One or more embodiments of the present disclosure relate to switching between execution schedules related to execution of tasks, or runnables, by multiple compute engines. The execution schedules includes respective sets of commands that dictate timing and order of execution, by the compute engines, of tasks, or runnables, corresponding to computing applications.
    Type: Application
    Filed: May 7, 2024
    Publication date: September 5, 2024
    Inventors: Ashutosh Tadkase, Ian Tramble, Akash Bellubbi, Suraj Das, Ranvijay Singh, Linda Xiong, John Lore, Albert Davies, Ian Howson, Peter Boonstoppel, Sai Gurrappadi, Pulkit Desai, Sever Topan, Sharat Janapareddy, Ashkan Vafaee, Michael Cox
  • Publication number: 20240272943
    Abstract: One or more embodiments of the present disclosure relate to executing, by a plurality of compute engines, a plurality of runnables of a computing application based at least on an execution schedule and a set of commands associated with the execution schedule. The execution schedule may be generated using a compiling system to include the set of commands. The set of commands may include one or more individual commands corresponding to one or more timing fences dictating a timing and order of execution of one or more individual runnables of the plurality of runnables.
    Type: Application
    Filed: April 16, 2024
    Publication date: August 15, 2024
    Inventors: Ashutosh Tadkase, Akash Bellubbi, Ian Tramble, Peter Boonstoppel, Suraj Das, Ranvijay Singh, Sever Topan, Albert Davies, Linda Xiong, Sharat Janapareddy, Ashkan Vafaee, Sai Gurrappadi, Pulkit Desai, John Lore, Michael Cox, Ian Howson
  • Publication number: 20230103826
    Abstract: One or more embodiments of the present disclosure relate to receiving application data indicative of a plurality of runnables corresponding to a computing application. Additionally, one or more embodiments may relate to generating, based at least on the application data, an execution schedule for execution of the plurality of runnables using a plurality of compute engines. The execution schedule may include one or more commands corresponding to one or more timing fences. The one or more timing fences may dictate a timing and order of execution between at least a first runnable and a second runnable of the plurality of runnables.
    Type: Application
    Filed: September 2, 2022
    Publication date: April 6, 2023
    Inventors: Ian Tramble, Akash Bellubbi, Ashutosh Tadkase, Peter Boonstoppel, Suraj Das, Ranvijay Singh, Sever Topan, Albert Davies, Linda Xiong, Sharat Janapareddy, Ashkan Vafaee, John Lore, Ian Howson
  • Publication number: 20230100552
    Abstract: One or more embodiments of the present disclosure relate to identifying, based on application data associated with a computing application that includes a set of runnables, a plurality of scheduling branches associated with scheduling execution of at least a subset of runnables of the set of runnables. Further, one or more embodiments relate to selecting a scheduling branch from the plurality of scheduling branches based at least on a coupling constraint that is applied to related runnables of at least the subset of runnables. The related runnables may include a first runnable that is designated for execution on a first compute engine and that triggers execution of a second runnable on a second compute engine. In addition, one or more embodiments may relate to determining an execution schedule of the set of runnables based at least on the scheduling branch.
    Type: Application
    Filed: September 2, 2022
    Publication date: March 30, 2023
    Inventors: Albert Davies, Akash Bellubbi, Ashutosh Tadkase, Bruce Holmer, Suraj Das, Vishanth Iyer, Sever Topan, Ian Tramble, Linda Xiong, Sharat Janapareddy, Ranvijay Singh, John Lore
  • Publication number: 20230102089
    Abstract: One or more embodiments of the present disclosure relate to monitoring execution of runnables that may be executed by a computing system, the executing begin based at least on a schedule. The monitoring may include one or more of: monitoring timing of execution of the runnables, monitoring one or more sequences of execution of the runnables, or monitoring health of at least a portion of the computing system executing the runnables. Additionally or alternatively, one or more embodiments may relate to determining compliance with respect to one or more execution constraints based at least in part on the monitoring.
    Type: Application
    Filed: September 2, 2022
    Publication date: March 30, 2023
    Inventors: Akash Bellubbi, Albert Davies, Ashutosh Tadkase, Sharat Janapareddy, Suraj Das, Ranvijay Singh, Ashkan Vafaee, Pulkit Desai, Michael Cox, Peter Boonstoppel
  • Publication number: 20230096502
    Abstract: One or more embodiments of the present disclosure relate to executing, by a plurality of compute engines, a plurality of runnables of a computing application based at least on an execution schedule and a set of commands associated with the execution schedule. The execution schedule may be generated using a compiling system to include the set of commands. The set of commands may include one or more individual commands corresponding to one or more timing fences dictating a timing and order of execution of one or more individual runnables of the plurality of runnables.
    Type: Application
    Filed: September 2, 2022
    Publication date: March 30, 2023
    Inventors: Ashutosh Tadkase, Akash Bellubbi, Ian Tramble, Peter Boonstoppel, Suraj Das, Ranvijay Singh, Sever Topan, Albert Davies, Linda Xiong, Sharat Janapareddy, Ashkan Vafaee, Sai Gurrappadi, Bruce Holmer, Vishanth Iyer, John Lore, Ian Howson, Pulkit Desai, Michael Cox