Abstract: A high speed read-only memory (ROM). Data stored in a memory cell in the ROM array is provided to a sense amplifier in a differential form. Two transistors storing complementary logic states form a memory cell and store a data bit. One transistor has a source terminal connected to a ground terminal while the other transistor has a source terminal left unconnected. The drain terminals of each of the two transistors is connected to a corresponding one of a differential bit-line pair which provides a differential signal representing the stored data bit to a sense amplifier.

Abstract: The memory array contains two layers representing word lines of different rows. Each row contains multiple bit cells sharing the same word line. The two layers are stacked one on top of another to form a high density memory array.

Abstract: The layers forming word lines of adjacent rows of a memory array are stacked (laid on each other). As a result, the density of the memory array is enhanced.