Abstract: A thermal management system includes an integrated circuit (IC). The IC includes a plurality of digitally addressable sectors. Each sector includes an on-die sensing element. The on-die sensing element includes an on-die temperature sensor configured to measure a sector temperature and provide an analog signal associated with the sector temperature; and an on-die digitizer configured to generate a digital sensed temperature signal based on the analog signal. The IC further includes a first output configured to output a plurality of digital sensed temperature signals from the plurality of sectors.

Abstract: The disclosure provides simple, low-cost but accurate systems and related methods for on-die temperature sensing typically using calibration and without the need for precision voltage references. In some implementations, the system utilizes two user selectable temperature sensing elements and two user selectable DACs to provide a digital code for the sensed temperature. In some implementations, the two sensing elements can be used to calibrate against each other. For example, calibration can be useful to account for silicon local/global variation. Typically, one of the temperature sensors is diode-based, while the other is resistor-based. However, those of skill in the art will recognize that, in accordance with the disclosure, more than two sensors can be provided that can be calibrated against one another.

Abstract: A circuit for testing bond connections between a first die and a second die is described. The circuit comprises a defect monitoring circuit implemented on the first die, which is configured as a test die; and a plurality of bond connections between the first die and the second die; wherein the defect monitoring circuit is configured to detect a defect in a bond connection of the plurality of bond connections between the first die and the second die. A method of testing bond connections between a first die and a second die is also described.

Abstract: An integrated circuit (IC) comprises routing circuitry including a plurality of signal line segments in routing layers of the IC, and a plurality of micro-bump contacts coupled to the routing circuitry. The IC includes a plurality of test circuits coupled to respective subsets of the plurality of signal line segments. Each test circuit is configured to connect micro-bump contacts in the respective subset to form first and second sets of daisy chains. Each test circuit is configured to test the first and second sets of daisy chains for open circuits and test for short circuits between the first and second sets of daisy chains. Each test circuit is configured to determine the locations of detected open circuits and determine the locations of detected short circuits.

Abstract: An integrated circuit (IC) comprises routing circuitry including a plurality of signal line segments in routing layers of the IC, and a plurality of micro-bump contacts coupled to the routing circuitry. The IC includes a plurality of test circuits coupled to respective subsets of the plurality of signal line segments. Each test circuit is configured to connect micro-bump contacts in the respective subset to form first and second sets of daisy chains. Each test circuit is configured to test the first and second sets of daisy chains for open circuits and test for short circuits between the first and second sets of daisy chains. Each test circuit is configured to determine the locations of detected open circuits and determine the locations of detected short circuits.