Abstract: A memory device having a plurality of addressable memory locations, each of which can be defined uniquely by an address having an X component and a Y component. The locations correspond respectively to grid points in a rectangular array at a pitch dX in the X direction and a pitch dY in the Y direction is loaded with data values at locations corresponding to grid points lying substantially on a line from a location (X.sub.0 +e*dX, Y.sub.0 +f*dY) to a location (X.sub.0 +p*dX, Y.sub.0 +q*dY), where X.sub.0, Y.sub.0) is a grid point and e, f, p, and q are integers. The memory device is loaded by a method which includes(a) setting s=floor (p/q)______________________________________ PInc = p - sq -q NInc = p -sq AErr.sub.0 = PInc ______________________________________(b) for each value of i in the range from 0 to q-1, executing ______________________________________ If AErr.sub.i >= 0 then X.sub.i+i : = X.sub.i + (s + 1)dX AErr.sub.i+1 : = AErr.sub.i + PInc else X.sub.i+1 : = X.sub.i + sdX AErr.sub.