Patents by Inventor Suribhotla Rajasekhar

Suribhotla Rajasekhar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9157897
    Abstract: An ultrasound transmitter including intrinsic output zeroing is disclosed herein. A transmitter for generating ultrasound signals includes a first transmitter output driver and a first transmitter input driver. The first transmitter output driver includes an N-type device serially coupled to a P-type device. The first transmitter input driver includes an N-type device serially coupled to a P-type device. An output of the first transmitter input driver is coupled to an input of the first transmitter output driver. The first transmitter output driver drives an output of the transmitter to a first voltage and the first transmitter input driver drives the output of the transmitter to a second voltage while the first transmitter output driver is disabled.
    Type: Grant
    Filed: October 21, 2009
    Date of Patent: October 13, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ismail H. Oguzman, Arash Loloee, Suribhotla Rajasekhar, Karthik Vasanth
  • Patent number: 8148914
    Abstract: In accordance with an aspect of the present invention, an LED driving circuit includes a digital-to-analog converter and a driving portion. The circuit is operable to turn off the digital-to-analog converter at times when the driving portion is not providing a high signal. As such the digital-to-analog converter will waste less energy.
    Type: Grant
    Filed: August 4, 2009
    Date of Patent: April 3, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Jonne J. Sebastian Lindeberg, Tri Cao Nguyen, Suribhotla Rajasekhar
  • Publication number: 20110088475
    Abstract: An ultrasound transmitter including intrinsic output zeroing is disclosed herein. A transmitter for generating ultrasound signals includes a first transmitter output driver and a first transmitter input driver. The first transmitter output driver includes an N-type device serially coupled to a P-type device. The first transmitter input driver includes an N-type device serially coupled to a P-type device. An output of the first transmitter input driver is coupled to an input of the first transmitter output driver. The first transmitter output driver drives an output of the transmitter to a first voltage and the first transmitter input driver drives the output of the transmitter to a second voltage while the first transmitter output driver is disabled.
    Type: Application
    Filed: October 21, 2009
    Publication date: April 21, 2011
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ismail H. OGUZMAN, Arash LOLOEE, Suribhotla RAJASEKHAR, Karthik VASANTH
  • Publication number: 20100164396
    Abstract: In accordance with an aspect of the present invention, an LED driving circuit includes a digital-to-analog converter and a driving portion. The circuit is operable to turn off the digital-to-analog converter at times when the driving portion is not providing a high signal. As such the digital-to-analog converter will waste less energy.
    Type: Application
    Filed: August 4, 2009
    Publication date: July 1, 2010
    Inventors: Jonne J. Sebastian Lindeberg, Tri Cao Nguyen, Suribhotla Rajasekhar
  • Patent number: 7391195
    Abstract: In a method and system for controlling a direct current to direct current (DC-DC) converter includes an inductor coupled to receive a voltage input at an input terminal. A diode is coupled in series between the inductor and an output terminal of the DC-DC converter. A switch is coupled between the inductor and a ground reference. The switch receives a control signal from a controller for adjusting a duty cycle of the DC-DC converter. The duty cycle controls an output voltage at the output terminal. The controller generates the control signal in response to receiving a feedback signal, which is derived as a predefined function of a voltage feedback signal indicative of the output voltage and a current feedback signal indicative of a current flowing through the inductor.
    Type: Grant
    Filed: May 18, 2005
    Date of Patent: June 24, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Kee-Chee Tiew, Jingwei Xu, Suribhotla Rajasekhar
  • Publication number: 20060261786
    Abstract: In a method and system for controlling a direct current to direct current (DC-DC) converter includes an inductor coupled to receive a voltage input at an input terminal. A diode is coupled in series between the inductor and an output terminal of the DC-DC converter. A switch is coupled between the inductor and a ground reference. The switch receives a control signal from a controller for adjusting a duty cycle of the DC-DC converter. The duty cycle controls an output voltage at the output terminal. The controller generates the control signal in response to receiving a feedback signal, which is derived as a predefined function of a voltage feedback signal indicative of the output voltage and a current feedback signal indicative of a current flowing through the inductor.
    Type: Application
    Filed: May 18, 2005
    Publication date: November 23, 2006
    Applicant: Texas Instruments Incorporated
    Inventors: Kee-Chee Tiew, Jingwei Xu, Suribhotla Rajasekhar
  • Publication number: 20060132108
    Abstract: A programmable voltage regulator configurable for reverse blocking and double power density is disclosed herein. The programmable voltage regulator includes an error amplifier that couples to receive a reference voltage. A first NMOS pass transistor connects between an auxiliary voltage input node and the output terminal of the voltage regulator, wherein the first NMOS pass transistor is biased by the output of the error amplifier. Connected between the source of the first NMOS pass transistor and the second input of the error amplifier, a feedback network provides feedback for the voltage regulator. A second NMOS pass transistor connects between the first power supply and the auxiliary voltage input node. Furthermore, an independent node control circuit biases the second NMOS pass transistor such that in a first mode of operation, a first control signal input is operable to receive a signal for controlling the second NMOS pass transistor during reverse battery condition.
    Type: Application
    Filed: December 20, 2004
    Publication date: June 22, 2006
    Inventors: Ross Teggatz, Sanmukh Patel, Rex Teggatz, Suribhotla Rajasekhar, Valerian Mayega
  • Publication number: 20060103432
    Abstract: A deglitch circuit utilizes a first flip-flop coupled to the input signal and a second flip-flop coupled to the output of a circuit with feedback from the output to gates to control first and second inputs to the first flip-flop. In an alternative arrangement, a counter is provided between the output of the first flip-flop and the input to the second flip-flop in order to provide flexibility and the possibility of a longer delay for the circuit.
    Type: Application
    Filed: July 29, 2005
    Publication date: May 18, 2006
    Inventors: Suribhotla Rajasekhar, Hasibur Rahman, Alexander Teutsch, William Grose
  • Publication number: 20050140437
    Abstract: A bias device that modifies the bias of a device based on an input signal to the device. The device may have a fixed bias, and the bias device can be connected in parallel with the fixed bias. The device can be an amplifier, such as a linear amplifier or a class AB amplifier. The bias device can be configured to provide maximum bias during the device's crossover time period.
    Type: Application
    Filed: December 29, 2003
    Publication date: June 30, 2005
    Inventors: Kenneth Maclean, Suribhotla Rajasekhar, David Baldwin, Marco Corsi, Tobin Hagan
  • Publication number: 20050140425
    Abstract: A FET switching transistor for the solenoid coil of an ABS braking system can switched ON or OFF in no more than substantially 250 ns. A higher current biasing circuit for fast turn on of the FET switching transistor is disconnected when it is necessary to limit the current flowing therethrough, whether during the inrush current to the solenoid coil or due to a fault in the system. The high speed switching of the FET switching transistor causes ringing of the current through the transistor which causes the current detector circuit to exit the current control mode. A deglitch circuit prevents the current detector from exiting the current control mode, so that a timer can be used to turn off the FET switching transistor before it can be damaged by the heat generated during current limit operation.
    Type: Application
    Filed: September 28, 2004
    Publication date: June 30, 2005
    Inventors: Reed Adams, Thomas Schmidt, Suribhotla Rajasekhar