Patents by Inventor Suriya Madras-Subramanian

Suriya Madras-Subramanian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Instruction and logic to perform dynamic binary translation
    Patent number: 10649746
    Abstract: A micro-architecture may provide a hardware and software co-designed dynamic binary translation. The micro-architecture may invoke a method to perform a dynamic binary translation. The method may comprise executing original software code compiled targeting a first instruction set, using processor hardware to detect a hot spot in the software code and passing control to a binary translation translator, determining a hot spot region for translation, generating the translated code using a second instruction set, placing the translated code in a translation cache, executing the translated code from the translated cache, and transitioning back to the original software code after the translated code finishes execution.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: May 12, 2020
    Assignee: Intel Corporation
    Inventors: Abhay S. Kanhere, Paul Caprioli, Koichi Yamada, Suriya Madras-Subramanian, Srinivas Suresh
  • INSTRUCTION AND LOGIC TO PERFORM DYNAMIC BINARY TRANSLATION
    Publication number: 20160357528
    Abstract: A micro-architecture may provide a hardware and software co-designed dynamic binary translation. The micro-architecture may invoke a method to perform a dynamic binary translation. The method may comprise executing original software code compiled targeting a first instruction set, using processor hardware to detect a hot spot in the software code and passing control to a binary translation translator, determining a hot spot region for translation, generating the translated code using a second instruction set, placing the translated code in a translation cache, executing the translated code from the translated cache, and transitioning back to the original software code after the translated code finishes execution.
    Type: Application
    Filed: August 15, 2016
    Publication date: December 8, 2016
    Applicant: lntel Corporation
    Inventors: Abhay S. Kanhere, Paul Caprioli, Koichi Yamada, Suriya Madras-Subramanian, Srinivas Suresh
  • Instruction and logic to perform dynamic binary translation
    Patent number: 9417855
    Abstract: A micro-architecture may provide a hardware and software co-designed dynamic binary translation. The micro-architecture may invoke a method to perform a dynamic binary translation. The method may comprise executing original software code compiled targeting a first instruction set, using processor hardware to detect a hot spot in the software code and passing control to a binary translation translator, determining a hot spot region for translation, generating the translated code using a second instruction set, placing the translated code in a translation cache, executing the translated code from the translated cache, and transitioning back to the original software code after the translated code finishes execution.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: August 16, 2016
    Assignee: Intel Corporation
    Inventors: Abhay S. Kanhere, Paul Caprioli, Koichi Yamada, Suriya Madras-Subramanian, Suresh Srinivas
  • INSTRUCTION AND LOGIC TO PERFORM DYNAMIC BINARY TRANSLATION
    Publication number: 20130283249
    Abstract: A micro-architecture may provide a hardware and software co-designed dynamic binary translation. The micro-architecture may invoke a method to perform a dynamic binary translation. The method may comprise executing original software code compiled targeting a first instruction set, using processor hardware to detect a hot spot in the software code and passing control to a binary translation translator, determining a hot spot region for translation, generating the translated code using a second instruction set, placing the translated code in a translation cache, executing the translated code from the translated cache, and transitioning back to the original software code after the translated code finishes execution.
    Type: Application
    Filed: September 30, 2011
    Publication date: October 24, 2013
    Inventors: Abhay S. Kanhere, Paul Caprioli, Koichi Yamada, Suriya Madras-Subramanian, Suresh Srinivas