Abstract: An inductor formed within an integrated circuit and a method for forming the inductor. The inductor comprises an underlying layer of aluminum formed in a first metallization layer and patterned and etched into the desired shape. In one embodiment the aluminum line comprises a spiral shape. According to a damascene process, a conductive runner, preferably of copper, is formed in a dielectric layer overlying the aluminum line and in electrical contact therewith. The aluminum line and the conductive runner cooperate to form the inductor. In another embodiment the aluminum line and the conductive runner are formed in a vertically spaced-apart orientation, with tungsten plugs or conductive vias formed to provide electrical connection therebetween. A method for forming the inductor comprises forming an aluminum conductive line and forming a conductive runner over the conductive line.

Abstract: An inductor formed within an integrated circuit and a method for forming the inductor. The inductor comprises an underlying layer of aluminum formed in a first metallization layer and patterned and etched into the desired shape. In one embodiment the aluminum line comprises a spiral shape. According to a damascene process, a conductive runner, preferably of copper, is formed in a dielectric layer overlying the aluminum line and in electrical contact therewith. The aluminum line and the conductive runner cooperate to form the inductor. In another embodiment the aluminum line and the conductive runner are formed in a vertically spaced-apart orientation, with tungsten plugs or conductive vias formed to provide electrical connection therebetween. A method for forming the inductor comprises forming an aluminum conductive line and forming a conductive runner over the conductive line.

Abstract: An inductor formed within an integrated circuit and a method for forming the inductor. The inductor comprises an underlying layer of aluminum formed in a first metallization layer and patterned and etched into the desired shape. In one embodiment the aluminum line comprises a spiral shape. According to a damascene process, a conductive runner, preferably of copper, is formed in a dielectric layer overlying the aluminum line and in electrical contact therewith. The aluminum line and the conductive runner cooperate to form the inductor. In another embodiment the aluminum line and the conductive runner are formed in a vertically spaced-apart orientation, with tungsten plugs or conductive vias formed to provide electrical connection therebetween. A method for forming the inductor comprises forming an aluminum conductive line and forming a conductive runner over the conductive line.

Abstract: An inductor formed within an integrated circuit and a method for forming the inductor. The inductor comprises an underlying layer of aluminum formed in a first metallization layer and patterned and etched into the desired shape. In one embodiment the aluminum line comprises a spiral shape. According to a damascene process, a conductive runner, preferably of copper, is formed in a dielectric layer overlying the aluminum line and in electrical contact therewith. The aluminum line and the conductive runner cooperate to form the inductor. In another embodiment the aluminum line and the conductive runner are formed in a vertically spaced-apart orientation, with tungsten plugs or conductive vias formed to provide electrical connection therebetween. A method for forming the inductor comprises forming an aluminum conductive line and forming a conductive runner over the conductive line.

Abstract: A split barrier layer enables copper interconnect wires to be used in conjunction with low-k dielectric films by preventing the diffusion of N—H base groups into photoresists where they can render the photoresist insoluble. The split barrier layer is disposed between the copper and the low-k dielectric and includes a nitrogen-containing, oxygen-free film which contacts the copper, and an oxygen-containing, nitrogen-free film which contacts the low-k dielectric film. The nitrogen-containing film prevents the formation of undesirable copper oxides, and the oxygen-containing film prevents the diffusion of N—H base groups into the low-k dielectric films. The oxygen-containing film may be an oxygen-doped silicon carbide film in an exemplary embodiment. In another embodiment, a film stack of low-k dielectric films includes an etch-stop layer and hardmask each formed of oxygen-doped silicon carbide.

Abstract: A structure and method for fabricating integrated circuits with improved electrical performance. The structure comprises electronic devices formed along a semiconductor surface, a first upper level of interconnect members over the semiconductor surface, a lower level of interconnect members formed between the semiconductor surface and the first upper level, and insulative material positioned to electrically isolate portions of the upper level of interconnect members from one another. The insulative material comprises a continuous layer extending from within regions between members of the upper interconnect level to within regions between members of the lower interconnect level and is characterized by a dielectric constant less than 3.9. The method begins with a semiconductor layer having electronic device regions thereon. A first insulative layer is deposited over the electronic device regions and a lower level of interconnect members is formed over the first insulative layer.

Abstract: A porous insulator material and method of manufacturing. The material comprises oxygen, silicon and hydrogen characterized by a density less than 2 g/cc. Alternately, the porous insulator material is characterized by a refractive index less than 1.45 for light at a wavelength between 633 nm and 673 nm, or by a Young's modulus less than 45 GPa. A method for manufacturing a semiconductor device includes providing a semiconductor layer with an upper surface for device formation and forming multiple levels of interconnect over the semiconductor layer, each level including a plurality of members. The members are electrically isolated from other members by decomposition of TEOS to form a porous layer between at least some of the members.

Abstract: A split barrier layer enables copper interconnect wires to be used in conjunction with low-k dielectric films by preventing the diffusion of N—H base groups into photoresists where they can render the photoresist insoluble. The split barrier layer is disposed between the copper and the low-k dielectric and includes a nitrogen-containing, oxygen-free film which contacts the copper, and an oxygen-containing, nitrogen-free film which contacts the low-k dielectric film. The nitrogen-containing film prevents the formation of undesirable copper oxides, and the oxygen-containing film prevents the diffusion of N—H base groups into the low-k dielectric films. The oxygen-containing film may be an oxygen-doped silicon carbide film in an exemplary embodiment. In another embodiment, a film stack of low-k dielectric films includes an etch-stop layer and hardmask each formed of oxygen-doped silicon carbide.

Abstract: An apparatus for determining the endpoint in a chemical mechanical polishing operation used for polishing a metal-containing material includes an electrochemical cell and an electronic circuit. An acidic polishing slurry is used to oxidize the metal and the oxidized metal is included in an effluent slurry stream, a sample of which is provided to the apparatus. The apparatus includes a liquid-phase working electrode, a reference electrode and a solid electrolyte which allows for the interchange of ions between the electrodes. An electronic circuit is coupled to the electrode for monitoring the component activity of the effluent slurry stream by measuring the electric potential across the electrodes. When the measured electric potential changes, indicating a change in the composition of the effluent slurry, endpoint is indicated.

Abstract: A method for determining the endpoint in a chemical mechanical polishing operation used for polishing a metal-containing material. An acidic polishing slurry is used to oxidize the metal and the oxidized metal is included in an effluent slurry stream. The effluent slurry stream is directed into a vessel which forms an electrochemical cell. The component activity of the effluent slurry stream is monitored within the electrochemical cell by measuring the electric potential across the electrodes of the electrochemical cell. When the measured electric potential changes, indicating a change in the composition of the effluent slurry, endpoint is indicated.

Abstract: A method of semiconductor circuit fabrication utilizing the poly buffered LOCOS process is disclosed. Amorphous silicon is desirably formed by the decomposition of disilane at temperatures between 400-525.degree. C. The amorphous silicon exhibits less pits than what is produced by conventional processes. The absence of pits contributes to eventual substrate integrity.