Patents by Inventor Susan J. Swindlehurst

Susan J. Swindlehurst has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6146984
    Abstract: Uniform height solder bumps are created on a semiconductor wafer by exposing a dummy pattern of under bump metal for solder plating. The dummy pattern of exposed under bump metal follows the outer edge outline of a pattern of die that exists on the semiconductor wafer. The dummy pattern of under bump metal is exposed by removing a portion of a layer of photoresist that is deposited over the under bump metal. The dummy pattern of under bump metal is exposed on the wafer at the same time that under bump metal above the contact pads is exposed. Solder material is then plated onto the exposed under bump metal that exists above the contact pads and in the dummy pattern. The dummy pattern of exposed under bump metal around the outer edge of the die pattern causes current crowding to occur primarily at the dummy pattern of exposed under bump metal instead of at the contact pads that are on die at the outer edge of the die pattern.
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: November 14, 2000
    Assignee: Agilent Technologies Inc.
    Inventors: Jacques Leibovitz, Susan J. Swindlehurst
  • Patent number: 6085968
    Abstract: A method of forming solder bumps on a wafer. The wafer includes at least one substrate, a plurality of solder-wettable pads and a solder wettable retention ring about the periphery of the wafer. The method of forming solder bumps includes forming a non-solder-wettable mask on the wafer which includes a plurality of apertures which align with the solder-wettable pads, and the solder wettable retention ring surrounds the mask. The mask and wafer are positioned within an aperture of a stencil so that the solder wettable retention ring aligns with a gap between the periphery edge of the mask and an inside edge of the aperture of the stencil. Solder paste is applied to the mask so that the solder paste fills the apertures of the mask and the gap. The solder paste is reflowed forming solder bumps on the pads and a solder ring on the solder wettable retention ring. The mask is removed after formation of the solder bumps.
    Type: Grant
    Filed: January 22, 1999
    Date of Patent: July 11, 2000
    Assignee: Hewlett-Packard Company
    Inventors: Susan J. Swindlehurst, Hubert A. Vander Plas, Jacques Leibovitz
  • Patent number: 6011314
    Abstract: An integrated circuit redistribution structure. The integrated circuit redistribution structure includes a plurality of conductive pads located on an active side of an integrated circuit. The integrated circuit redistribution structure includes a redistribution layer and an under bump material structure for receiving a solder bump. The redistribution layer can include a first mechanically protective layer which adheres to the active side of the integrated circuit. The redistribution layer includes a plurality of conductive lines in which at least one of the conductive lines is connected to at least one conductive pad. Each conductive line includes an adhesion and diffusion barrier layer, an electrical conductor layer, and a first metallic protective layer. The under bump material structure is formed over at least one conductive line.
    Type: Grant
    Filed: February 1, 1999
    Date of Patent: January 4, 2000
    Assignee: Hewlett-Packard Company
    Inventors: Jacques Leibovitz, Park-Kee Yu, Ya Yun Zhu, Maria L. Cobarruviaz, Susan J. Swindlehurst, Cheng-Cheng Chang, Kenneth D. Scholz