Abstract: A method of forming a heat-treated liquid nutritional composition having a neutral pH and comprising a water-insoluble plant flavonoid comprises providing an aqueous liquid nutritional composition having a pH of from about 6 to about 7.5 and comprising protein, fat, carbohydrate, and water-insoluble plant flavonoid, homogenizing the liquid nutritional composition at a pressure of at least about 2000 psi, and heat treating the liquid nutritional composition. A heat-treated liquid nutritional composition having a pH of from about 6 to about 7.5 comprises a water-insoluble plant flavonoid, protein, fat and carbohydrate. At least about 75 wt % of the water-insoluble plant flavonoid remains suspended throughout the liquid nutritional composition after two months of storage at room temperature.

Abstract: Systems and methods for allocating memory and redirecting data writes based on temperature of memory modules in a cloud computing system are described. A method includes maintaining temperature profiles for a first plurality of memory modules and a second plurality of memory modules. The method includes automatically redirecting a first request to write to memory from a first compute entity being executed by the first processor to a selected one of a first plurality of memory chips, whose temperature does not meet or exceed the temperature threshold, included in at least the first plurality of memory modules and automatically redirecting a second request to write to memory from a second compute entity being executed by the second processor to a selected one of the second plurality of memory chips, whose temperature does not meet or exceed the temperature threshold, included in at least the second plurality of memory modules.

Abstract: A system for detecting access to a security sensitive component on an electronic device includes a PCB-mounted connector that provides read/write access to a security sensitive component on the PCB. The system further includes a connector cap that mates with at least a portion of the connector and that includes circuitry that facilitates current flow across at least a portion of the PCB-mounted connector when the connector cap is mated with the PCB-mounted connector, When removed from the PCB-mounted connector, the current flow is disrupted. The system further includes an intrusion detection controller that monitors a voltage at a sampling point adjacent to detect removal of the connector cap and to generate an intrusion logfile entry in response.

Abstract: Systems and methods for allocating memory and redirecting data writes based on temperature of memory modules in a cloud computing system are described. A method includes maintaining temperature profiles for a first plurality of memory modules and a second plurality of memory modules, The method includes automatically redirecting a first request to write to memory from a first compute entity being executed by the first processor to a selected one of a first plurality of memory chips, whose temperature does not meet or exceed the temperature threshold, included in at least the first plurality of memory modules and automatically redirecting a second request to write to memory from a second compute entity being executed by the second processor to a selected one of the second plurality of memory chips, whose temperature does not meet or exceed the temperature threshold, included in at least the second plurality of memory modules.

Abstract: Systems and methods for allocating memory and redirecting data writes based on temperature of memory modules in a cloud computing system are described. A method includes maintaining temperature profiles for a first plurality of memory modules and a second plurality of memory modules. The method includes automatically redirecting a first request to write to memory from a first compute entity being executed by the first processor to a selected one of a first plurality of memory chips, whose temperature does not meet or exceed the temperature threshold, included in at least the first plurality of memory modules and automatically redirecting a second request to write to memory from a second compute entity being executed by the second processor to a selected one of the second plurality of memory chips, whose temperature does not meet or exceed the temperature threshold, included in at least the second plurality of memory modules.

Abstract: Systems and methods for allocating memory and redirecting data writes based on temperature of memory modules in a cloud computing system are described. A method includes maintaining temperature profiles for a first plurality of memory modules and a second plurality of memory modules. The method includes automatically redirecting a first request to write to memory from a first compute entity being executed by the first processor to a selected one of a first plurality of memory chips, whose temperature does not meet or exceed the temperature threshold, included in at least the first plurality of memory modules and automatically redirecting a second request to write to memory from a second compute entity being executed by the second processor to a selected one of the second plurality of memory chips, whose temperature does not meet or exceed the temperature threshold, included in at least the second plurality of memory modules.

Abstract: A power semiconductor device that includes a stack of a thin metal layer and a thick metal layer over the active region thereof, and a method for the fabrication thereof.

Abstract: A power semiconductor device that includes a stack of a thin metal layer and a thick metal layer over the active region thereof, and a method for the fabrication thereof.

Abstract: A power semiconductor device that includes a stack of a thin metal layer and a thick metal layer over the active region thereof, and a method for the fabrication thereof.

Abstract: A power semiconductor device that includes a stack of a thin metal layer and a thick metal layer over the active region thereof, and a method for the fabrication thereof.

Abstract: A power semiconductor device that includes a stack of a thin metal layer and a thick metal layer over the active region thereof, and a method for the fabrication thereof.

Abstract: A power semiconductor package that includes a power semiconductor device having a threshold voltage that does not vary when subjected to an autoclave test.

Abstract: A power semiconductor package that includes a power semiconductor device having a threshold voltage that does not vary when subjected to an autoclave test.

Abstract: A power semiconductor device that includes a stack of a thin metal layer and a thick metal layer over the active region thereof, and a method for the fabrication thereof.

Abstract: The prior art requires the selective removal of antifuse material from the bottom of the standard via. This cannot always be accomplished without damage to the nearby antifuse. In addition, in the absence of antifuse structural isolation, problems were encountered at M2 etch in consistently removing the full thickness of metallic material at this level. Shorting due to underetch was often encountered. These problems were solved by first forming only the antifuse via. This allowed the via to be controlled and optimized for antifuse requirements and for the antifuse material to be patterned without regard to possible side effects on the standard vias. Design rules for overlaps of overfuse and M2 layers were amended such that each antifuse is individually isolated. The latter were then formed, without (as in the prior art) any concerns that the antifuse might be affected.

Abstract: The prior art requires the selective removal of antifuse material from the bottom of the standard via. This cannot always be accomplished without damage to the nearby antifuse. In addition in the absence of antifuse structural isolation, problems were encountered at M2 etch in consistently removing the full thickness of metallic material at this level. Shorting due to underetch was often encountered. These problems were solved by first forming only the antifuse via. This allowed the via to be controlled and optimized for antifuse requirements and for the antifuse material to be patterned without regard to possible side effects on the standard vias. Design rules for overlaps of overfuse and M2 layers were amended such that each antifuse is individually isolated. The latter were then formed, without (as in the prior art) any concerns that the antifuse might be affected.