Patents by Inventor Susanne Menezes

Susanne Menezes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same
    Patent number: 10037956
    Abstract: The invention relates to a ball-limiting metallurgy stack for an electrical device that contains at least one copper layer disposed upon a Ti adhesion metal layer. The ball-limiting metallurgy stack resists Sn migration toward the upper metallization of the device.
    Type: Grant
    Filed: January 14, 2015
    Date of Patent: July 31, 2018
    Assignee: Intel Corporation
    Inventors: Madhav Datta, Dave Emory, Subhash M. Joshi, Susanne Menezes, Doowon Suh
  • COPPER-CONTAINING C4 BALL-LIMITING METALLURGY STACK FOR ENHANCED RELIABILITY OF PACKAGED STRUCTURES AND METHOD OF MAKING SAME
    Publication number: 20170141062
    Abstract: The invention relates to a ball-limiting metallurgy stack for an electrical device that contains at least one copper layer disposed upon a Ti adhesion metal layer. The ball-limiting metallurgy stack resists Sn migration toward the upper metallization of the device.
    Type: Application
    Filed: January 30, 2017
    Publication date: May 18, 2017
    Inventors: Madhav Datta, Dave Emory, Subhash M. Joshi, Susanne Menezes, Doowon Suh
  • COPPER-CONTAINING C4 BALL-LIMITING METALLURGY STACK FOR ENHANCED RELIABILITY OF PACKAGED STRUCTURES AND METHOD OF MAKING SAME
    Publication number: 20150132940
    Abstract: The invention relates to a ball-limiting metallurgy stack for an electrical device that contains at least one copper layer disposed upon a Ti adhesion metal layer. The ball-limiting metallurgy stack resists Sn migration toward the upper metallization of the device.
    Type: Application
    Filed: January 14, 2015
    Publication date: May 14, 2015
    Applicant: INTEL CORPORATION
    Inventors: Madhav Datta, Dave Emory, Subhash M. Joshi, Susanne Menezes, Doowon Suh
  • Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same
    Patent number: 8952550
    Abstract: The invention relates to a ball-limiting metallurgy stack for an electrical device that contains at least one copper layer disposed upon a Ti adhesion metal layer. The ball-limiting metallurgy stack resists Sn migration toward the upper metallization of the device.
    Type: Grant
    Filed: January 12, 2010
    Date of Patent: February 10, 2015
    Assignee: Intel Corporation
    Inventors: Madhav Datta, Dave Emory, Subhash M. Joshi, Susanne Menezes, Doowon Suh
  • Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same
    Publication number: 20100117229
    Abstract: The invention relates to a ball-limiting metallurgy stack for an electrical device that contains at least one copper layer disposed upon a Ti adhesion metal layer. The ball-limiting metallurgy stack resists Sn migration toward the upper metallization of the device.
    Type: Application
    Filed: January 12, 2010
    Publication date: May 13, 2010
    Inventors: Madhav Datta, Dave Emory, Subhash M. Joshi, Susanne Menezes, Doowon Suh
  • Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same
    Patent number: 7250678
    Abstract: The invention relates to a ball-limiting metallurgy stack for an electrical device that contains at least one copper layer disposed upon a Ti adhesion metal layer. The ball-limiting metallurgy stack resists Sn migration toward the upper metallization of the device.
    Type: Grant
    Filed: February 10, 2004
    Date of Patent: July 31, 2007
    Assignee: Intel Corporation
    Inventors: Madhav Datta, Dave Emory, Subhash M. Joshi, Susanne Menezes, Doowon Suh
  • Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same
    Patent number: 7196001
    Abstract: The invention relates to a ball-limiting metallurgy stack for an electrical device that contains at least one copper layer disposed upon a Ti adhesion metal layer. The ball-limiting metallurgy stack resists Sn migration toward the upper metallization of the device.
    Type: Grant
    Filed: February 10, 2004
    Date of Patent: March 27, 2007
    Assignee: Intel Corporation
    Inventors: Madhav Datta, Dave Emory, Subhash M. Joshi, Susanne Menezes, Doowon Suh
  • Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same
    Publication number: 20060148233
    Abstract: The invention relates to a ball-limiting metallurgy stack for an electrical device that contains at least one copper layer disposed upon a Ti adhesion metal layer. The ball-limiting metallurgy stack resists Sn migration toward the upper metallization of the device.
    Type: Application
    Filed: March 1, 2006
    Publication date: July 6, 2006
    Inventors: Madhav Datta, Dave Emory, Subhash Joshi, Susanne Menezes, Doowon Suh
  • Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same
    Patent number: 6853076
    Abstract: The invention relates to a ball-limiting metallurgy stack for an electrical device that contains at least one copper layer disposed upon a Ti adhesion metal layer. The ball-limiting metallurgy stack resists Sn migration toward the upper metallization of the device.
    Type: Grant
    Filed: September 21, 2001
    Date of Patent: February 8, 2005
    Assignee: Intel Corporation
    Inventors: Madhav Datta, Dave Emory, Subhash M. Joshi, Susanne Menezes, Doowon Suh
  • Forming defect prevention trenches in dicing streets
    Patent number: 6838299
    Abstract: A method of dicing a microelectronic device wafer comprising forming at least one trench in at least one dicing street on the microelectronic device wafer, wherein the trench prevents cracking and/or delamination problems in the interconnect layer of the microelectronic device wafers caused by a subsequent dicing by a wafer saw.
    Type: Grant
    Filed: November 28, 2001
    Date of Patent: January 4, 2005
    Assignee: Intel Corporation
    Inventors: Rose A. Mulligan, Jun He, Thomas Marieb, Susanne Menezes, Steven Towle
  • Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same
    Publication number: 20040159947
    Abstract: The invention relates to a ball-limiting metallurgy stack for an electrical device that contains at least one copper layer disposed upon a Ti adhesion metal layer. The ball-limiting metallurgy stack resists Sn migration toward the upper metallization of the device.
    Type: Application
    Filed: February 10, 2004
    Publication date: August 19, 2004
    Inventors: Madhav Datta, Dave Emory, Subhash M. Joshi, Susanne Menezes, Doowon Suh
  • Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same
    Publication number: 20040159944
    Abstract: The invention relates to a ball-limiting metallurgy stack for an electrical device that contains at least one copper layer disposed upon a Ti adhesion metal layer. The ball-limiting metallurgy stack resists Sn migration toward the upper metallization of the device.
    Type: Application
    Filed: February 10, 2004
    Publication date: August 19, 2004
    Inventors: Madhav Datta, Dave Emory, Subhash M. Joshi, Susanne Menezes, Doowon Suh
  • Forming defect prevention trenches in dicing streets
    Publication number: 20030100143
    Abstract: A method of dicing a microelectronic device wafer comprising forming at least one trench in at least one dicing street on the microelectronic device wafer, wherein the trench prevents cracking and/or delamination problems in the interconnect layer of the microelectronic device wafers caused by a subsequent dicing by a wafer saw.
    Type: Application
    Filed: November 28, 2001
    Publication date: May 29, 2003
    Inventors: Rose A. Mulligan, Jun He, Thomas Marieb, Susanne Menezes, Steven Towle
  • Dual-stack, ball-limiting metallurgy and method of making same
    Publication number: 20030060041
    Abstract: The invention relates to a ball-limiting metallurgy (BLM) stack for an electrical device. The dual BLM stack resists tin migration toward the upper metallization of the device.
    Type: Application
    Filed: September 21, 2001
    Publication date: March 27, 2003
    Applicant: Intel Corporation
    Inventors: Madhav Datta, Dave Emory, Subhash M. Joshi, Susanne Menezes, Doowon Suh
  • Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same
    Publication number: 20030057551
    Abstract: The invention relates to a ball-limiting metallurgy stack for an electrical device that contains at least one copper layer disposed upon a Ti adhesion metal layer. The ball-limiting metallurgy stack resists Sn migration toward the upper metallization of the device.
    Type: Application
    Filed: September 21, 2001
    Publication date: March 27, 2003
    Applicant: Intel Corporation
    Inventors: Madhav Datta, Dave Emory, Subhash M. Joshi, Susanne Menezes, Doowon Suh