Patents by Inventor Susant K. Patra

Susant K. Patra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11942759
    Abstract: The present technology can be used to control the current injection profile in the longitudinal direction of a high-power diode laser in order to optimize current densities as a function of position in the cavity to promote higher reliable output power and increase the electrical to optical conversion efficiency of the device beyond the level which can be achieved without application of this technique. This approach can be utilized, e.g., in the fabrication of semiconductor laser chips to improve the output power and wall plug efficiency for applications requiring improved performance operation.
    Type: Grant
    Filed: January 31, 2023
    Date of Patent: March 26, 2024
    Assignee: LAWRENCE LIVERMORE NATIONAL SECURITY, LLC
    Inventors: Paul O. Leisher, Robert J. Deri, Susant K. Patra
  • Patent number: 11768340
    Abstract: The present disclosure relates to an interconnect system for interfacing an electronic subsystem to a qubit package, wherein the qubit package has a plurality of independent qubits. The system makes use of an optical fiber cable having a plurality of optical fibers, which is interfaced to the electronic subsystem. A 3D optical structure is used which has a plurality of internal waveguides, and which is configured to interface the optical fiber cable to the qubit package. The 3D optical structure further has at least one subsystem for using the plurality of waveguides to receive signals of a first type from at least one of the qubits package or the optical fiber cable, to convert the signals from the first type to a second type, and to transmit the signals in the second type to the other one of the fiber optic cable or the qubit package.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: September 26, 2023
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: Susant K. Patra, Jonathan L. Dubois
  • Publication number: 20230178960
    Abstract: The present technology can be used to control the current injection profile in the longitudinal direction of a high-power diode laser in order to optimize current densities as a function of position in the cavity to promote higher reliable output power and increase the electrical to optical conversion efficiency of the device beyond the level which can be achieved without application of this technique. This approach can be utilized, e.g., in the fabrication of semiconductor laser chips to improve the output power and wall plug efficiency for applications requiring improved performance operation.
    Type: Application
    Filed: January 31, 2023
    Publication date: June 8, 2023
    Applicant: LAWRENCE LIVERMORE NATIONAL SECURITY, LLC
    Inventors: Paul O. Leisher, Robert J. Deri, Susant K. Patra
  • Patent number: 11658460
    Abstract: The present technology can be used to control the current injection profile in the longitudinal direction of a high-power diode laser in order to optimize current densities as a function of position in the cavity to promote higher reliable output power and increase the electrical to optical conversion efficiency of the device beyond the level which can be achieved without application of this technique. This approach can be utilized, e.g., in the fabrication of semiconductor laser chips to improve the output power and wall plug efficiency for applications requiring improved performance operation.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: May 23, 2023
    Assignee: LAWRENCE LIVERMORE NATIONAL SECURITY, LLC
    Inventors: Paul O. Leisher, Robert J. Deri, Susant K. Patra
  • Publication number: 20230074774
    Abstract: The present disclosure relates to an interconnect system for interfacing an electronic subsystem to a qubit package, wherein the qubit package has a plurality of independent qubits. The system makes use of an optical fiber cable having a plurality of optical fibers, which is interfaced to the electronic subsystem. A 3D optical structure is used which has a plurality of internal waveguides, and which is configured to interface the optical fiber cable to the qubit package. The 3D optical structure further has at least one subsystem for using the plurality of waveguides to receive signals of a first type from at least one of the qubits package or the optical fiber cable, to convert the signals from the first type to a second type, and to transmit the signals in the second type to the other one of the fiber optic cable or the qubit package.
    Type: Application
    Filed: September 3, 2021
    Publication date: March 9, 2023
    Inventors: Susant K. PATRA, Jonathan L. DUBOIS
  • Publication number: 20220221670
    Abstract: The present disclosure relates to a monolithic waveguide substrate for enabling routing of at least one optical signal. The monolithic waveguide substrate has a monolithic engineered substrate having a uniform material composition throughout, with a first index of refraction, and with a plurality of three-dimensional waveguides each being formed fully within an interior volume thereof by a corresponding plurality of three-dimensional waveguide channels. The three-dimensional waveguide channels are formed by wall portions each having a second index of refraction different from the first index of refraction.
    Type: Application
    Filed: January 28, 2022
    Publication date: July 14, 2022
    Inventors: Susant K. PATRA, Razi-Ul Muhammad HAQUE, Komal KAMPASI, Ian Seth LADNER
  • Patent number: 11053603
    Abstract: A method of producing a complex product includes designing a three dimensional preform of the complex product, creating a three dimensional preform of the complex product using the model, depositing a material on the preform, and removing the preform to complete the complex product. In one embodiment the system provides a complex heat sink that can be used in heat dissipation in power electronics, light emitting diodes, and microchips.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: July 6, 2021
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: Andrew J. Pascall, Hannah Grace Coe, Julie A. Jackson, Susant K. Patra
  • Publication number: 20210057879
    Abstract: The present technology can be used to control the current injection profile in the longitudinal direction of a high-power diode laser in order to optimize current densities as a function of position in the cavity to promote higher reliable output power and increase the electrical to optical conversion efficiency of the device beyond the level which can be achieved without application of this technique. This approach can be utilized, e.g., in the fabrication of semiconductor laser chips to improve the output power and wall plug efficiency for applications requiring improved performance operation.
    Type: Application
    Filed: March 26, 2019
    Publication date: February 25, 2021
    Applicant: Lawrence Livermore National Security, LLC
    Inventors: Paul O. Leisher, Robert J. Deri, Susant K. Patra
  • Publication number: 20190153609
    Abstract: A method of producing a complex product includes designing a three dimensional preform of the complex product, creating a three dimensional preform of the complex product using the model, depositing a material on the preform, and removing the preform to complete the complex product. In one embodiment the system provides a complex heat sink that can be used in heat dissipation in power electronics, light emitting diodes, and microchips.
    Type: Application
    Filed: January 17, 2019
    Publication date: May 23, 2019
    Inventors: Andrew J. Pascall, Hannah Grace Coe, Julie A. Jackson, Susant K. Patra
  • Patent number: 10221498
    Abstract: A method of producing a complex product includes designing a three dimensional preform of the complex product, creating a three dimensional preform of the complex product using the model, depositing a material on the preform, and removing the preform to complete the complex product. In one embodiment the system provides a complex heat sink that can be used in heat dissipation in power electronics, light emitting diodes, and microchips.
    Type: Grant
    Filed: August 11, 2015
    Date of Patent: March 5, 2019
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: Andrew J. Pascall, Hannah Grace Coe, Julie A. Jackson, Susant K. Patra
  • Patent number: 9917647
    Abstract: A combination underfill-dam and electrical-interconnect structure for an opto-electronic engine. The structure includes a first plurality of electrical-interconnect solder bodies. The first plurality of electrical-interconnect solder bodies includes a plurality of electrical interconnects. The first plurality of electrical-interconnect solder bodies, is disposed to inhibit intrusion of underfill material into an optical pathway of an opto-electronic component for the opto-electronic engine. A system and an opto-electronic engine that include the combination underfill-dam and electrical interconnect structure are also provided.
    Type: Grant
    Filed: January 31, 2012
    Date of Patent: March 13, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Sagi Varghese Mathai, Michael Renne Ty Tan, Paul Kessler Rosenberg, Wayne Victor Sorin, Georgios Panotopoulos, Susant K. Patra, Joseph Straznicky
  • Publication number: 20170049008
    Abstract: A method of producing a complex product includes designing a three dimensional preform of the complex product, creating a three dimensional preform of the complex product using the model, depositing a material on the preform, and removing the preform to complete the complex product. In one embodiment the system provides a complex heat sink that can be used in heat dissipation in power electronics, light emitting diodes, and microchips.
    Type: Application
    Filed: August 11, 2015
    Publication date: February 16, 2017
    Inventors: Andrew J. Pascall, Hannah Grace Coe, Julie A. Jackson, Susant K. Patra
  • Patent number: 9354388
    Abstract: A composite wafer includes a molded wafer and a second wafer. The molded wafer includes a plurality of first components, and the second wafer includes a plurality of second components. The second wafer is combined with the molded wafer to form the composite wafer. At least one of the first components is aligned with at least one of the second components to form a multi-component element. The multi-component element is singulatable from the composite wafer.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: May 31, 2016
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Michael Renne Ty Tan, Georgios Panotopoulos, Paul Kessler Rosenberg, Sagi Varhgese Mathai, Wayne Victor Sorin, Susant K. Patra
  • Patent number: 9285544
    Abstract: An optical power splitter includes a zig-zag and a reflector element associated with the zig-zag. The zig-zag is to split an input signal based on the reflector element, and output a plurality of split signals.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: March 15, 2016
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Georgios Panotopoulos, Michael Renne Ty Tan, Paul Kessler Rosenberg, Sagi Varghese Mathai, Wayne V. Sorin, Susant K. Patra
  • Patent number: 9164249
    Abstract: A glass-silicon wafer stacked platform. The platform includes a plurality of silicon pillars defining a ferrule receptacle, a silicon spacer connected to bases of the pillars and enclosing an aperture, a glass wafer bonded to the spacer, a microlens array formed in a first surface of the glass wafer and located in the aperture, conductive material carried by a second surface of the glass wafer, and contacts in electrical communication with the conductive material.
    Type: Grant
    Filed: January 27, 2012
    Date of Patent: October 20, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Sagi Varghese Mathai, Michael Renne Ty Tan, Wayne Victor Sorin, Paul Kessler Rosenberg, Georgios Panotopoulos, Susant K Patra
  • Publication number: 20150117823
    Abstract: A fiber connector assembly is provided. The fiber connector assembly includes a fiber connector, a zig-zag member, a signal direction element, and a signal splitting element. The fiber connector receives an input signal from an input fiber. The zig-zag member relays the input signal using a plurality of relay mirrors. The signal direction element directs the input signal and the output signal. The signal splitting element separates the output signal from the input signal. The fiber connector couples the output signal to an output fiber.
    Type: Application
    Filed: May 24, 2012
    Publication date: April 30, 2015
    Inventors: Georgios Panotopoulos, Michael Renne Ty Tan, Paul Kessler Roserberg, Wayne Victor Sorin, Sagi Varghese Mathai, Susant K. Patra
  • Patent number: 9014519
    Abstract: An optoelectronic interface includes an optically transparent substrate; and an alignment layer comprising a pattern of alignment features disposed on said optically transparent substrate.
    Type: Grant
    Filed: October 14, 2011
    Date of Patent: April 21, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Sagi Varghese Mathai, Michael Renne Ty Tan, Paul Kessler Rosenberg, Wayne V. Sorin, Georgios Panotopoulos, Susant K. Patra
  • Publication number: 20140341516
    Abstract: A glass-silicon wafer stacked platform.
    Type: Application
    Filed: January 27, 2012
    Publication date: November 20, 2014
    Inventors: Sagi Varghese Mathai, Michael Renne Ty Tan, Wayne Victor Sorin, Paul Kessler Rosenberg, Georgios Panotopoulos, Susant K Patra
  • Publication number: 20140328596
    Abstract: A combination underfill-dam and electrical-interconnect structure for an opto-electronic engine. The structure includes a first plurality of electrical-interconnect solder bodies. The first plurality of electrical-interconnect solder bodies includes a plurality of electrical interconnects. The first plurality of electrical-interconnect solder bodies, is disposed to inhibit intrusion of underfill material into an optical pathway of an opto-electronic component for the opto-electronic engine. A system and an opto-electronic engine that include the combination underfill-dam and electrical interconnect structure are also provided.
    Type: Application
    Filed: January 31, 2012
    Publication date: November 6, 2014
    Inventors: Sagi Varghese Mathai, Michael Renne Ty Tan, Paul Kessler Rosenberg, Wayne Victor Sorin, Georgios Panotopoulos, Susant K. Patra, Joseph Straznicky
  • Patent number: 8822275
    Abstract: A composite wafer includes a molded wafer and a second wafer. The molded wafer includes a plurality of first components, and the second wafer includes a plurality of second components. The second wafer is combined with the molded wafer to form the composite wafer. At least one of the first components is aligned with at least one of the second components to form a multi-component element. The multi-component element is singulatable from the composite wafer.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: September 2, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Michael Renne Ty Tan, Georgios Panotopoulos, Paul Kessler Rosenberg, Sagi Varghese Mathai, Wayne Victor Sorin, Susant K Patra