Abstract: A high speed Advanced Programmable Interrupt Controller (APIC) system includes a plurality of local units for prioritizing and passing interrupts, an Input/Output (I/O) unit for feeding interrupts to the local units, and a serial link data transmission system for interconnecting the I/O unit and the local units. The I/O unit and each local unit have a parallel I/O interface.

Abstract: A Multi-Chip-Module (MCM) microcircuit comprises a substrate, a plurality of integrated circuit processors mounted on the substrate, and an Advanced Programmable Interrupt Controller (APIC) system for distributing interrupts to the processors. The APIC system comprises a plurality of local units for prioritizing and passing interrupts to the processors respectively, and an Input/Output (I/O) unit for feeding interrupts to processors to which the interrupts are addressed. Electrical conductor patterns are formed on and between dielectric layers of the substrate for interconnecting the processors, the local units and the I/O unit.

Abstract: A system of the invention connects an Asynchronous Transfer Mode (ATM) data network to a plurality of host units. The data network transfers data in the form of ATM cells. A plurality of ATM termination units are connected between the network and the host units respectively. Each termination unit includes a virtual channel memory for storing ATM cells; a processor for segmenting and reassembling the ATM cells stored in the memory; a network interface for transferring ATM cells including segmented Conversion Sublayer Payload Data Units (CS-PDU)s between the memory, the processor and an ATM network; and a host interface for transferring unsegmented CS-PDUs between the memory, the processor and a host unit. The processor of each termination unit includes a computing unit, and a programmable instruction memory for storing a program for controlling the computing unit.