Abstract: An array of quantum dot qubits (e.g., an array of spin qubits) relies on a gradient magnetic field to ensure that the qubits are separated in frequency in order to be individually addressable. Furthermore, a strong magnetic field gradient is required to electrically drive the electric dipole spin resonance (EDSR) of the qubits. Quantum dot devices disclosed herein use microcoil arrangements for providing a gradient magnetic field, the microcoil arrangements integrated on the same chip (e.g., on the same die or wafer) as quantum dot qubits themselves. Unlike previous approaches to quantum dot formation and manipulation, various embodiments of the quantum dot devices disclosed herein may enable improved control over magnetic fields and their gradients to realize better frequency targeting of individual qubits, help minimize adverse effects of charge noise on qubit decoherence and provide good scalability in the number of quantum dots included in the device.

Abstract: An array of quantum dot qubits (e.g., an array of spin qubits) relies on a gradient magnetic field to ensure that the qubits are separated in frequency in order to be individually addressable. Furthermore, a strong magnetic field gradient is required to electrically drive the electric dipole spin resonance (EDSR) of the qubits. Quantum dot devices disclosed herein use microcoil arrangements for providing a gradient magnetic field, the microcoil arrangements integrated on the same chip (e.g., on the same die or wafer) as quantum dot qubits themselves. Unlike previous approaches to quantum dot formation and manipulation, various embodiments of the quantum dot devices disclosed herein may enable improved control over magnetic fields and their gradients to realize better frequency targeting of individual qubits, help minimize adverse effects of charge noise on qubit decoherence and provide good scalability in the number of quantum dots included in the device.

Abstract: Technologies for the reduction of memory effects in a capacitor are disclosed. In the illustrative embodiment, a companion chip is connected to a quantum processor. The companion chip provides voltages to gates of qubits on the quantum processor. The companion chip includes an array of capacitors that can be charged to a voltage based on a voltage to be applied to a gate of the quantum processor. The capacitors in the array of capacitors are connected to the gate one at a time, charging up a parasitic capacitance. As more capacitors are switched, the voltage on the gate approaches a target voltage with an exponentially-decreasing voltage error.

Abstract: Technologies for a high-voltage transmission gate are disclosed. In the illustrative embodiment, a companion chip is connected to a quantum processor. The companion chip provides voltages to gates of qubits on the quantum processor. The companion chip includes one or more high-voltage transmission gates that can be used to charge capacitors linked to gates of qubits on the quantum processor. The transmission gate includes transistors with a breakdown voltage less than a range of input and output voltages of the transmission gate. Control circuitry on the companion chip controls the voltages applied to transistors of the transmission gate to ensure that the voltage differences across the terminals of each transistor is below a breakdown voltage.

Abstract: Apparatus and methods for interfacing an integrated qubit control chip and a solid state qubit; detecting a qubit state with a transition pulse histogram; high resolution and high speed rectangular pulse generation; large-scale spin qubit state readout; and activity-based clock control.

Abstract: An array of quantum dot qubits (e.g., an array of spin qubits) relies on a gradient magnetic field to ensure that the qubits are separated in frequency in order to be individually addressable. Furthermore, a strong magnetic field gradient is required to electrically drive the electric dipole spin resonance (EDSR) of the qubits. Quantum dot devices disclosed herein use microcoil arrangements for providing a gradient magnetic field, the microcoil arrangements integrated on the same chip (e.g., on the same die or wafer) as quantum dot qubits themselves. Unlike previous approaches to quantum dot formation and manipulation, various embodiments of the quantum dot devices disclosed herein may enable improved control over magnetic fields and their gradients to realize better frequency targeting of individual qubits, help minimize adverse effects of charge noise on qubit decoherence and provide good scalability in the number of quantum dots included in the device.

Abstract: Technologies for high-speed interfaces for cryogenic quantum control are disclosed. In the illustrative embodiment, a die for quantum/classical interface circuitry includes digital circuitry operating in a first clock domain and analog circuitry operating in a second clock domain. Clock domain crossing circuitry facilitates asynchronous data transfer from the digital circuitry to the analog circuitry. The illustrative clock domain crossing circuitry includes a first asynchronous first-in-first-out (FIFO) queue at the border of the first clock domain. The first asynchronous FIFO queue is connected to a second asynchronous FIFO queue at the border of the second clock domain.

Abstract: Technologies for impedance matching networks for qubits are disclosed. In one illustrative embodiment, an impedance matching network matches a 50 Ohm transmission line to a spin qubit with a state-dependent resistance of 100 kiloohms to 105 kiloohms. The illustrative impedance matching network is tunable, allowing the impedance transformation ratio to be changed without significantly changing the matching frequency of the impedance matching network. In some embodiments, the impedance matching network matches a 50 Ohm transmission line to a lower-resistance state of a qubit. In other embodiments, the impedance matching network matches a 50 Ohm transmission line to an impedance value in between a lower-resistance state and a higher-resistance state of a qubit.

Abstract: Technologies for signal conditioning for signals for qubits are disclosed. In the illustrative embodiment, a finite impulse response filter is applied to a control signal for a target qubit to filter out a frequency corresponding to a collateral qubit. An infinite impulse response filter is then applied to the signal after the finite impulse response filter, which amplifies some of the frequencies filtered out by the finite impulse response, narrowing the bandwidth that is filtered out. Such an approach reduces the attenuation of the signal and can be used to reduce memory requirements of quantum/classical interface circuitry.

Abstract: Quantum circuit assemblies that employ active pulse shaping in order to be able to control states of a plurality of qubits with signal pulses propagated over a shared signal propagation channel are disclosed. An example quantum circuit assembly includes a quantum circuit component that includes a first qubit, associated with a first frequency to control the state of the first qubit, and a second qubit, associated with a second frequency to control the state of the second qubit. A shared transmission channel is coupled to the first and second qubits. The assembly further includes a signal pulse generation circuit, configured to generate a signal pulse to be propagated over the shared transmission channel to control the state of the first qubit, where the signal pulse has a center frequency at the first frequency, a bandwidth that includes the second frequency, and a notch at the second frequency.

Abstract: Apparatus and method for correcting quantum bit states. For example, one embodiment of an apparatus comprises: a phase error evaluator to evaluate a quantum instruction sequence of a quantum program to determine accumulated phase error; phase correction hardware logic to insert one or more phase correction instructions into the quantum instruction sequence to generate a modified quantum instruction sequence to correct the accumulated phase error; and wherein the modified quantum instruction sequence or a translated version thereof is to be executed by a qubit controller chip.

Abstract: An example quantum circuit assembly includes a quantum circuit component with a plurality of qubits operable by selectively applying control signals to various terminals of the qubits. The assembly further includes an array of analog memory cells, a DAC configured to sequentially generate analog values/signals to be stored in different ones of the analog memory cells, and a switching arrangement configured to selectively apply control signals to various ones of qubit terminals, where each control signal is applied by the switching arrangement electrically connecting an output terminal of a different analog memory cell of the array of analog memory cells to one of the qubit terminals. Performing digital-to-analog conversion ahead of performing qubit operations and storing results of the conversion in different analog memory cells allows pre-generating and storing analog voltages required for qubit operations that may be carried out during the qubit coherence time.

Abstract: Apparatus and method for arbitrary qubit rotation. For example, one embodiment of a processor comprises: a decoder to decode a quantum rotation instruction specifying an arbitrary rotation value for performing a rotation of a quantum bit (qubit); a storage to store data for a plurality of waveform shapes/pulses; execution circuitry to perform the rotation of the qubit, the execution circuitry to combine a subset of the plurality of waveform shapes/pulses to approximate the arbitrary rotation value; and a classical-quantum (C-Q) interface coupled to the execution circuitry and comprising digital-to-analog circuitry to generate analog signals to rotate the qubit based on the approximation of the rotation value.