Abstract: A radio mapping architecture for applying machine learning techniques to mobile wireless radio access networks, including a base station, a user equipment (UE), and a network is provided. The radio mapping architecture includes a spectrum monitoring unit and a server and utilizes the UE. The server includes a radio mapping database and a Machine Learning module. The UE or the spectrum monitoring unit captures Radio parameters to derive an input schema for the radio mapping database. The spectrum monitoring unit extracts the Radio parameters that correspond to the base station and the UE and updates them in the radio mapping database periodically. The input schema for the radio mapping database is updated with the Radio parameters sensed by the spectrum monitoring unit and the UE.

Abstract: A virtual Radio Access Network (vRAN) system (300) for provisioning a virtual Radio Access Network (RAN) that is portable across one or more RAN hardware platforms is provided. The virtual Radio Access Network (vRAN) system (300) includes a waveform development kit (WDK) (302), and a waveform execution environment (304). The waveform development kit (302) defines at least one portable Radio Access Network (RAN) application into a form that is instantiated on a RAN hardware (326). The waveform execution environment (304) (i) monitors real-time schedulable resources in real-time, and (ii) collects one or more statistics and monitors the one or more statistics for network automation. The waveform execution environment (304) includes a RAN hypervisor (314) that virtualizes at least one attribute of a spectral resource required to provision the RAN that is portable across at least one hardware platform of the one or more RAN hardware platforms in the RAN hardware.

Abstract: A method for implementing multi standard programmable low-density parity check decoder in a receiver is provided. The method includes (i) generating, by a control signal generation unit, pre computed control signals associated with a h-matrix, (ii) obtaining, by a control signal storage unit of a hardware decoder unit, the pre computed control signals associated with the h-matrix, (iii) obtaining, by a LLR memory fetch & data align unit, LLR bytes from a LLR memory unit, (iv) rotating, by a rotation and aligning unit, the LLR bytes to obtain aligned valid LLR bytes, (v) processing, by the processing element unit, the aligned valid LLR bytes to obtain an output data, and (vi) decoding, the h-matrix associated with at least one standard and code rates based on the pre computed control signals.

Abstract: A method for implementing multi standard programmable low-density parity check decoder in a receiver is provided. The method includes (i) generating, by a control signal generation unit, pre computed control signals associated with a h-matrix, (ii) obtaining, by a control signal storage unit of a hardware decoder unit, the pre computed control signals associated with the h-matrix, (iii) obtaining, by a LLR memory fetch & data align unit, LLR bytes from a LLR memory unit, (iv) rotating, by a rotation and aligning unit, the LLR bytes to obtain aligned valid LLR bytes, (v) processing, by the processing element unit, the aligned valid LLR bytes to obtain an output data, and (vi) decoding, the h-matrix associated with at least one standard and code rates based on the pre computed control signals.