Patents by Inventor Susumu Edo

Susumu Edo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8730442
    Abstract: A TFT substrate includes drain signal lines which are connected with respective pixels, source electrodes which are connected with the drain signal lines via channel portions of transistors, and pixel electrodes which are electrically connected with the source electrodes. The pixel electrode is, further, constituted of a contact-portion electrode which is connected to the source electrode, an opening-portion electrode which is an electrode in an opening portion which is not covered with a black matrix, and a channel upper electrode which is formed so as to cover the channel portion of the transistor of the neighboring pixel. By extending the channel upper electrode to the channel portion of the neighboring pixel, an area of the pixel electrode is increased, and a line width of the opening-portion electrode is made relatively small. Accordingly, the TFT substrate can hold a stable potential.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: May 20, 2014
    Assignees: Japan Display Inc., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Jiro Taniguchi, Eiichirou Itou, Saori Sugiyama, Susumu Edo
  • Patent number: 8139194
    Abstract: In a display device of built-in driver circuit type including a non-rectangular image display area, the frame area surrounding the display area is reduced and the wiring delay is reduced. The image display device includes a plurality of pixels arranged in an orthogonal matrix form, a plurality of scanning wiring lines connected to the plural pixels, a plurality of signal wiring lines connected to the plural pixels, the signal wiring lines being disposed to construct an orthogonal matrix form with the plural scanning wiring lines; signal wiring internal circuits for driving the plural signal wiring lines, and an image display area including a plurality of pixels, the image display area having a non-rectangular outer contour. The signal wiring internal circuits are separated from each other in an extending direction of the signal wiring lines in a unit of length of the pixel.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: March 20, 2012
    Assignees: Hitachi Display, Ltd., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Tsunenori Yamamoto, Ken Ohara, Yoshiaki Nakayoshi, Susumu Edo, Hiroshi Saito
  • Publication number: 20120001835
    Abstract: In a display device of built-in driver circuit type including a non-rectangular image display area, the frame area surrounding the display area is reduced and the wiring delay is reduced. The image display device includes a plurality of pixels arranged in an orthogonal matrix form, a plurality of scanning wiring lines connected to the plural pixels, a plurality of signal wiring lines connected to the plural pixels, the signal wiring lines being disposed to construct an orthogonal matrix form with the plural scanning wiring lines; signal wiring internal circuits for driving the plural signal wiring lines, and an image display area including a plurality of pixels, the image display area having a non-rectangular outer contour. The signal wiring internal circuits are separated from each other in an extending direction of the signal wiring lines in a unit of length of the pixel.
    Type: Application
    Filed: September 12, 2011
    Publication date: January 5, 2012
    Inventors: Tsunenori YAMAMOTO, Ken Ohara, Yoshiaki Nakayoshi, Susumu Edo, Hiroshi Saito
  • Patent number: 8059248
    Abstract: The TFT substrate includes a conductive region electrically conducted to the transparent conductive film and a terminal region, on a first side not covered with the counter substrate. The terminal region includes a ground terminal connected to the conductive region and an adjacent terminal which is adjacent to the ground terminal and supplies signals or power source to the peripheral circuit. The adjacent terminal is connected to the peripheral circuit through a first wiring installed along a third side of the TFT substrate toward a second side facing the first side. The first wiring is extended to a middle point of the third side and then connected to the peripheral circuit.
    Type: Grant
    Filed: August 27, 2009
    Date of Patent: November 15, 2011
    Assignee: Hitachi Displays, Ltd.
    Inventors: Takamitsu Kamada, Hiroaki Asuma, Susumu Edo, Kenji Kitajima
  • Patent number: 8023087
    Abstract: In a display device of built-in driver circuit type including a non-rectangular image display area, the frame area surrounding the display area is reduced and the wiring delay is reduced. The image display device includes a plurality of pixels arranged in an orthogonal matrix form, a plurality of scanning wiring lines connected to the plural pixels, a plurality of signal wiring lines connected to the plural pixels, the signal wiring lines being disposed to construct an orthogonal matrix form with the plural scanning wiring lines; signal wiring internal circuits for driving the plural signal wiring lines, and an image display area including a plurality of pixels, the image display area having a non-rectangular outer contour. The signal wiring internal circuits are separated from each other in an extending direction of the signal wiring lines in a unit of length of the pixel.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: September 20, 2011
    Assignee: Hitachi Displays, Ltd.
    Inventors: Tsunenori Yamamoto, Ken Ohara, Yoshiaki Nakayoshi, Susumu Edo, Hiroshi Saito
  • Patent number: 7990369
    Abstract: An image display apparatus configured by a display panel having an image memory element in a pixel, which achieves low power consumption. A nonvolatile image memory element 1, which can change the resistance value by phase change, is connected to a pixel electrode 25 of a liquid crystal element 5. The output of a thin-film transistor 17 driven by scanning and signal electrode lines 7, 9 is connected to the pixel electrode 25. When the scanning electrode line 7 is selected to have a high level voltage, the thin-film transistor 17 is turned on and a current signal flowing through the signal electrode 9 is sent through the image memory element 1 to a reference electrode line 15. Depending on the current value or pulse width passing through the image memory element 1, the resistance of the image memory element 1 is changed and is stored as a resistance value.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: August 2, 2011
    Assignee: Hitachi Displays, Ltd.
    Inventors: Tatsuya Sugita, Shinichi Komura, Shoichi Hirota, Tsunenori Yamamoto, Tetsuya Ooshima, Susumu Edo, Akitoyo Konno
  • Patent number: 7944514
    Abstract: The present invention allows decreasing the uneven image quality in a liquid crystal display device. The display device in accordance with the present invention includes plural scan signal lines, plural video signal lines, plural TFTs placed in a matrix structure, and plural pixel electrodes, when the width of the scan signal line in a region to place one TFT is different from the width of the scan signal line in a region to place another TFT which is different from the one TFT, the channel width and the channel length of the one TFT is almost equal to the channel width and the channel length of the another TFT, and the surface area of the region overlapping the source electrode with the scan signal line of the one TFT when viewing in plan view is almost equal to the surface area of the region overlapping the source electrode with the scan signal line of the another TFT when viewing in plan view.
    Type: Grant
    Filed: January 17, 2008
    Date of Patent: May 17, 2011
    Assignee: Hitachi Displays, Ltd.
    Inventors: Ken Ohara, Yoshiaki Nakayoshi, Tsunenori Yamamoto, Susumu Edo
  • Patent number: 7872629
    Abstract: A shift register circuit which stably operates with low electric power consumption and can realize a long life. In the shift register circuit constructed by connecting a plurality of fundamental circuits in each of which fundamental clocks of three phases are inputted to input terminals and is constructed by a gate line driving circuit, a timing control circuit, and a holding device control circuit, each of the gate line driving circuit and the timing control circuit has charging devices and holding devices. A node is stabilized by the timing control circuit.
    Type: Grant
    Filed: September 26, 2006
    Date of Patent: January 18, 2011
    Assignee: Hitachi Displays, Ltd.
    Inventors: Susumu Edo, Shinichi Komura, Masatoshi Wakagi
  • Patent number: 7859527
    Abstract: A reference voltage line is synchronously scanned with scanning of a scanning signal line, voltage of the reference voltage line is set to be the voltage of a common electrode, the second transistor is set to be OFF state during the reference voltage line is set in the common voltage for a pixel wherein a node between an image signal memory and said second transistor is set in a voltage so that said second transistor becomes OFF and the voltage of image signal line is set to be high voltage level when the voltage of the scanning signal line changes from low voltage level to high voltage level for the pixel wherein the node between the image signal memory and the second transistor is set in a voltage so that said second transistor becomes ON.
    Type: Grant
    Filed: September 21, 2004
    Date of Patent: December 28, 2010
    Assignee: Hitachi Displays, Ltd.
    Inventors: Shoichi Hirota, Susumu Edo, Hiroki Kaneko, Tetsuya Oshima, Tatsuya Sugita, Shinichi Komura, Katsuyuki Funahata
  • Publication number: 20100296019
    Abstract: A TFT substrate includes drain signal lines which are connected with respective pixels, source electrodes which are connected with the drain signal lines via channel portions of transistors, and pixel electrodes which are electrically connected with the source electrodes. The pixel electrode is, further, constituted of a contact-portion electrode which is connected to the source electrode, an opening-portion electrode which is an electrode in an opening portion which is not covered with a black matrix, and a channel upper electrode which is formed so as to cover the channel portion of the transistor of the neighboring pixel. By extending the channel upper electrode to the channel portion of the neighboring pixel, an area of the pixel electrode is increased, and a line width of the opening-portion electrode is made relatively small. Accordingly, the TFT substrate can hold a stable potential.
    Type: Application
    Filed: May 3, 2010
    Publication date: November 25, 2010
    Inventors: Jiro Taniguchi, Eiichirou Itou, Saori Sugiyama, Susumu Edo
  • Patent number: 7787089
    Abstract: A first conductive layer in which a first electrode film is formed, a first protective layer on the first conductive layer, a first hole penetrating through the first protective layer to reach the first electrode film, a second conductive layer including a second electrode film which is disposed on the first protective layer and in contact with a portion of the first electrode film at the bottom of the first hole and the lower electrode, a second protective layer disposed on the second conductive layer and including the insulating film, a second hole disposed on the second protective layer and penetrating through the second protective layer to reach the second electrode film, and a third conductive layer including a third electrode film which is in contact with a portion of the second electrode film at the bottom of the second hole and the upper electrode.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: August 31, 2010
    Assignee: Hitachi Displays, Ltd.
    Inventors: Hiroaki Asuma, Kenji Kitajima, Takamitsu Kamada, Susumu Edo, Ryouhei Suzuki
  • Patent number: 7710376
    Abstract: A display with low power consumption using a memory-incorporated pixel system capable of refreshing the image signal memory and updating an image without causing a flicker. Each pixel arranged in matrix has, at an intersection between the signal line and the scan line, a first transistor and a second transistor to drive the electrooptical medium. The second transistor has its gate connected with the image signal memory which in turn is connected to the reference voltage line. There is a parasitic capacitor between the gate of the second transistor and the scan line. The gate of the second transistor is also connected with an added capacitor. Further, the second transistor is connected with a holding capacitor and also has a parasitic capacitor.
    Type: Grant
    Filed: February 13, 2006
    Date of Patent: May 4, 2010
    Assignee: Hitachi Displays, Ltd.
    Inventors: Susumu Edo, Shoichi Hirota
  • Publication number: 20100079713
    Abstract: A first conductive layer in which a first electrode film is formed, a first protective layer on the first conductive layer, a first hole penetrating through the first protective layer to reach the first electrode film, a second conductive layer including a second electrode film which is disposed on the first protective layer and in contact with a portion of the first electrode film at the bottom of the first hole and the lower electrode, a second protective layer disposed on the second conductive layer and including the insulating film, a second hole disposed on the second protective layer and penetrating through the second protective layer to reach the second electrode film, and a third conductive layer including a third electrode film which is in contact with a portion of the second electrode film at the bottom of the second hole and the upper electrode.
    Type: Application
    Filed: September 25, 2009
    Publication date: April 1, 2010
    Inventors: Hiroaki Asuma, Kenji Kitajima, Takamitsu Kamada, Susumu Edo, Ryouhei Suzuki
  • Publication number: 20100053531
    Abstract: The TFT substrate includes a conductive region electrically conducted to the transparent conductive film and a terminal region, on a first side not covered with the counter substrate. The terminal region includes a ground terminal connected to the conductive region and an adjacent terminal which is adjacent to the ground terminal and supplies signals or power source to the peripheral circuit. The adjacent terminal is connected to the peripheral circuit through a first wiring installed along a third side of the TFT substrate toward a second side facing the first side. The first wiring is extended to a middle point of the third side and then connected to the peripheral circuit.
    Type: Application
    Filed: August 27, 2009
    Publication date: March 4, 2010
    Inventors: Takamitsu KAMADA, Hiroaki ASUMA, Susumu EDO, Kenji KITAJIMA
  • Publication number: 20090155933
    Abstract: To suppress the occurrence of image quality irregularities in a liquid crystal display device having a TFT substrate which is manufactured by performing steps a plurality of times in such a manner that one region is divided into a plurality of exposure regions, and the plurality of exposure regions is exposed.
    Type: Application
    Filed: December 10, 2008
    Publication date: June 18, 2009
    Inventors: Ken OHARA, Tsunenori Yamamoto, Susumu Edo, Yoshiaki Nakayoshi, Hiroshi Saito
  • Patent number: 7522146
    Abstract: A scanning-line selecting circuit is configured by connecting basic circuits with each other over plural stages. Each of the basic circuits includes a basic scanning-line driving circuit and a voltage raising circuit. A basic scanning signal is inputted into the basic scanning-line driving circuit, which, then, outputs a scanning signal. A charge pulse, a selecting signal, and a discharge pulse are inputted into the voltage raising circuit, which, then, drives the basic scanning-line driving circuit. Accordingly, in the basic circuits, there exists none of the problems of threshold-value shift and voltage lowering. This characteristic makes it possible to implement high efficiency and stable operation.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: April 21, 2009
    Assignee: Hitachi Displays, Ltd.
    Inventors: Susumu Edo, Shinichi Komura, Shoichi Hirota, Nobuyuki Ishige
  • Patent number: 7477223
    Abstract: A method of driving an active-matrix liquid-crystal display device includes a frame period of a picture displayed on a liquid-crystal panel divided into a scanning period and a hold period longer than the scanning period. In the scanning period, image data of an amount corresponding to a frame is written into the liquid-crystal panel. In the hold period following the scanning period, an off state is sustained. Each data line repeatedly experiences a positive-polarity frame period and a negative-polarity frame period, which are arranged alternately along the time axis. In a frame period, an electric potential appearing on a positive-polarity data line in the hold period is increased to a level higher than an electric potential appearing on an opposite electrode. The positive-polarity data line is defined as the data line, on which an electric potential appears at a level higher than an electric potential appearing on the opposite electrode.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: January 13, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Yoshifumi Sekiguchi, Shouichi Hirota, Shinichi Komura, Susumu Edo
  • Publication number: 20080225195
    Abstract: The present invention allows decreasing the uneven image quality in a liquid crystal display device. The display device in accordance with the present invention includes plural scan signal lines, plural video signal lines, plural TFTs placed in a matrix structure, and plural pixel electrodes, when the width of the scan signal line in a region to place one TFT is different from the width of the scan signal line in a region to place another TFT which is different from the one TFT, the channel width and the channel length of the one TFT is almost equal to the channel width and the channel length of the another TFT, and the surface area of the region overlapping the source electrode with the scan signal line of the one TFT when viewing in plan view is almost equal to the surface area of the region overlapping the source electrode with the scan signal line of the another TFT when viewing in plan view.
    Type: Application
    Filed: January 17, 2008
    Publication date: September 18, 2008
    Inventors: Ken OOHARA, Yoshiaki Nakayoshi, Tsunenori Yamamoto, Susumu Edo
  • Publication number: 20080048934
    Abstract: In a display device of built-in driver circuit type including a non-rectangular image display area, the frame area surrounding the display area is reduced and the wiring delay is reduced. The image display device includes a plurality of pixels arranged in an orthogonal matrix form, a plurality of scanning wiring lines connected to the plural pixels, a plurality of signal wiring lines connected to the plural pixels, the signal wiring lines being disposed to construct an orthogonal matrix form with the plural scanning wiring lines; signal wiring internal circuits for driving the plural signal wiring lines, and an image display area including a plurality of pixels, the image display area having a non-rectangular outer contour. The signal wiring internal circuits are separated from each other in an extending direction of the signal wiring lines in a unit of length of the pixel.
    Type: Application
    Filed: August 8, 2007
    Publication date: February 28, 2008
    Inventors: TSUNENORI YAMAMOTO, Ken Ohara, Yoshiaki Nakayoshi, Susumu Edo, Hiroshi Saito
  • Publication number: 20070222723
    Abstract: An image display apparatus configured by a display panel having an image memory element in a pixel, which achieves low power consumption. A nonvolatile image memory element 1, which can change the resistance value by phase change, is connected to a pixel electrode 25 of a liquid crystal element 5. The output of a thin-film transistor 17 driven by scanning and signal electrode lines 7, 9 is connected to the pixel electrode 25. When the scanning electrode line 7 is selected to have a high level voltage, the thin-film transistor 17 is turned on and a current signal flowing through the signal electrode 9 is sent through the image memory element 1 to a reference electrode line 15. Depending on the current value or pulse width passing through the image memory element 1, the resistance of the image memory element 1 is changed and is stored as a resistance value.
    Type: Application
    Filed: May 24, 2007
    Publication date: September 27, 2007
    Inventors: Tatsuya Sugita, Shinichi Komura, Shoichi Hirota, Tsunenori Yamamoto, Tetsuya Ooshima, Susumu Edo, Akitoyo Konno