Patents by Inventor Susumu Kagohashi

Susumu Kagohashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250048562
    Abstract: A wiring substrate includes a core substrate including a glass substrate and a through-hole conductor, a resin insulating layer having an opening extending through the resin insulating layer, a conductor layer including a seed layer and an electrolytic plating layer on the seed layer, and a via conductor formed in the opening such that the via conductor electrically connects to the through-hole conductor in the core substrate and includes the seed layer and electrolytic plating layer extending from the conductor layer. The resin insulating layer includes resin and inorganic particles including first and second particles such that the first particles are partially embedded in the resin and that the second particles are embedded in the resin, the first particles have first portions protruding from the resin and second portions embedded in the resin respectively, the surface includes the resin and exposed surfaces of the first portions exposed from the resin.
    Type: Application
    Filed: July 30, 2024
    Publication date: February 6, 2025
    Applicant: IBIDEN CO., LTD.
    Inventors: Masashi KUWABARA, Susumu KAGOHASHI, Jun SAKAI, Kyohei YOSHIKAWA, Takuya INISHI
  • Publication number: 20250008652
    Abstract: A printed wiring board includes a first insulating layer, a connection conductor having a connection wiring, a second insulating layer formed on the connection conductor layer, a mounting conductor layer including a first electrode that mounts a first electronic component and a second electrode that mounts a second electronic component, and connection via conductors including a first connection via conductor that electrically connects the first electrode and the connection wiring and a second connection via conductor that electrically connects the second electrode and the connection wiring. The first insulating layer includes resin and inorganic particles including first particles and second particles such that each first particle has a first portion protruding from the resin and a second portion embedded in the resin, and the surface of the first insulating layer includes a surface of the resin and exposed surfaces of the first portions exposed from the surface of the resin.
    Type: Application
    Filed: June 26, 2024
    Publication date: January 2, 2025
    Applicant: IBIDEN CO., LTD.
    Inventors: Masashi KUWABARA, Susumu KAGOHASHI, Jun SAKAI, Kyohei YOSHIKAWA
  • Publication number: 20250008651
    Abstract: A printed wiring board includes a first conductor layer, an insulating layer formed on the first conductor, a second conductor layer formed on the insulating layer, and a via conductor formed in the insulating layer such that the via conductor is penetrating through the insulating layer and connecting the first and second conductor layers. The insulating layer has a via hole in which the via conductor is formed such that inner wall surface in the via hole has a first inclined surface decreasing in diameter from the second conductor layer to a middle portion of the via hole in a thickness direction of the insulating layer, a second inclined surface decreasing in diameter from the middle portion to the first conductor layer with a smaller diameter than an end part of the first inclined surface in the middle portion, and a step surface connecting the first and second inclined surfaces.
    Type: Application
    Filed: June 25, 2024
    Publication date: January 2, 2025
    Applicant: IBIDEN CO., LTD.
    Inventors: Susumu KAGOHASHI, Jun SAKAI
  • Publication number: 20240407094
    Abstract: A printed wiring board includes a conductor layer including wirings, a resin insulating layer having openings, a mounting conductor layer including first and second electrodes, first via conductors including a seed layer and an electrolytic plating layer such that the first via conductors connect the first electrodes and the wirings, and second via conductors including the seed layer and electrolytic plating layer such that the second via conductors connect the second electrodes and the wirings. The first electrodes are positioned to mount a first electronic component. The second electrodes are positioned to mount a second electronic component. The first and second via conductors are formed such that the seed layer is covering an inner wall surface of each opening in the insulating layer and has a first portion and a second portion connected to the first portion and having a part of the first portion formed on the second portion.
    Type: Application
    Filed: May 31, 2024
    Publication date: December 5, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Masashi KUWABARA, Susumu KAGOHASHI, Jun SAKAI, Takuya INISHI, Kyohei YOSHIKAWA
  • Publication number: 20240365468
    Abstract: A wiring substrate includes a first build-up part including an insulating layer and a conductor layer, and a second build-up part laminated on the first build-up part and including an insulating layer and a conductor layer. The minimum width and minimum inter-wiring distance of wirings in the first build-up part are smaller than the minimum width and minimum inter-wiring distance of wirings in the second build-up part. The insulating layer in the first build-up part includes resin and inorganic particles including first inorganic particles partially embedded in the resin and second inorganic particles completely embedded in the resin such that the first inorganic particles have first portions protruding from the resin and second portions embedded in the resin, respectively. The insulating layer of the first build-up part has a surface covered by the conductor layer and including a surface of the resin and exposed surfaces of the first portions.
    Type: Application
    Filed: April 23, 2024
    Publication date: October 31, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Masashi KUWABARA, Susumu KAGOHASHI, Jun SAKAI, Kyohei YOSHIKAWA
  • Publication number: 20240363541
    Abstract: A wiring substrate includes a first build-up part including first insulating layers, first conductor layers, and first via conductors, and a second build-up part including second insulating layers and second conductor layers. The minimum wiring width and minimum inter-wiring distance in the first conductor layers are smaller than the minimum wiring width and minimum inter-wiring distance in the second conductor layers. The first conductor layers and via conductors include a first layer and a second layer formed on the first layer. The first layer includes a lower layer including a sputtering film including an alloy including copper, aluminum, and at least one element selected from nickel, zinc, gallium, silicon, and magnesium, and an upper layer including a sputtering film including copper. The lower layer is formed in contact with surfaces of the first insulating layers and inner wall surfaces and bottom surfaces in via openings for the first via conductors.
    Type: Application
    Filed: April 26, 2024
    Publication date: October 31, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Masashi KUWABARA, Susumu KAGOHASHI, Jun SAKAI, Kyohei YOSHIKAWA
  • Publication number: 20240341033
    Abstract: A wiring substrate includes a first build-up part including first insulating and conductor layers, and via conductors, and a second build-up part including second insulating and conductor layers. The first build-up part is laminated on the second build-up part. The minimum wiring width of wirings in the first conductor layers is smaller than the minimum wiring width of wirings in the second conductor layers. The minimum inter-wiring distance of the wirings in the first conductor layers is smaller than the minimum inter-wiring distance of the wirings in the second conductor layers. The first conductor layers and via conductors include a first layer and a second layer. The first layer of each via conductor is covering inner wall surface in a via opening and has a first portion and a second portion. The first portion has a portion formed closer to the center of the via opening than the second portion.
    Type: Application
    Filed: April 3, 2024
    Publication date: October 10, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Masashi KUWABARA, Susumu KAGOHASHI
  • Publication number: 20240341034
    Abstract: A wiring substrate includes a core substrate having a through-hole conductor, a resin insulating layer formed on the core substrate, a conductor layer formed on the insulating layer and including a seed layer and an electrolytic plating layer, and a via conductor formed in the insulating layer. The via conductor electrically connects the through-hole conductor and conductor layer. The via conductor includes the seed layer and electrolytic plating layer extending from the conductor layer. The core substrate includes a glass substrate and has a through hole penetrating through the glass substrate. The through-hole conductor is formed in the through hole. The seed layer is covering inner wall surface of the insulating layer in opening in which the via conductor is formed. The seed layer has a first portion and a second portion electrically connected to the first portion. That part of the first portion is formed on the second portion.
    Type: Application
    Filed: April 1, 2024
    Publication date: October 10, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Masashi KUWABARA, Susumu KAGOHASHI
  • Publication number: 20240339393
    Abstract: A wiring substrate includes a first build-up part including first insulating and conductor layers, and via conductors, and a second build-up part including second insulating and conductor layers. The minimum wiring width in the first conductor layers is smaller than the minimum wiring width in the second conductor layers. The minimum inter-wiring distance in the first conductor layers is smaller than the minimum inter-wiring distance in the second conductor layers. Each first conductor layer and each via conductor include first and second layers. The first layer includes a first portion covering respective surface of the first insulating layers, a second portion covering inner wall surface in respective via opening in the first insulating layers, and a third portion covering bottom surface in the respective via opening. The thickness of the first portion is larger than the thickness of the second portion and larger than the thickness of the third portion.
    Type: Application
    Filed: April 4, 2024
    Publication date: October 10, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Masashi KUWABARA, Susumu KAGOHASHI
  • Publication number: 20240292537
    Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on the resin insulating layer and including a seed layer and an electrolytic plating layer, and a via conductor connecting the first conductor layer and the second conductor layer and including the seed layer and electrolytic plating layer extending from the second conductor layer. The second conductor layer and via conductor are formed such that the seed layer includes a first layer including copper, aluminum and one or more metals selected from nickel, zinc, gallium, silicon and magnesium, and a second layer formed on the first layer and including copper. The seed layer in the via conductor has a first portion and a second portion such that the first portion is electrically connected to the second portion and has a portion formed on the second portion.
    Type: Application
    Filed: February 23, 2024
    Publication date: August 29, 2024
    Applicant: IBIDEN CO., LTD.
    Inventor: Susumu KAGOHASHI
  • Publication number: 20240292536
    Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer including resin and inorganic particles, a second conductor layer including a seed layer and an electrolytic plating layer on the seed layer, and a via conductor connecting the first conductor layer and second conductor layer and including the seed layer and electrolytic plating layer extending from the second conductor layer. The second conductor layer and via conductor are formed such that the seed layer includes an alloy including copper, aluminum and a metal including one or more metals selected from nickel, zinc, gallium, silicon and magnesium, and the resin insulating layer is formed such that the inorganic particles include first inorganic particles forming an inner wall surface in the opening and second inorganic particles embedded in the resin insulating layer and that shapes of the first inorganic particles are different from shapes of the second inorganic particles.
    Type: Application
    Filed: February 23, 2024
    Publication date: August 29, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Susumu KAGOHASHI, Kyohei YOSHIKAWA, Takuya INISHI, Jun SAKAI
  • Publication number: 20240284606
    Abstract: A wiring substrate includes a core substrate including a glass substrate, a resin insulating layer including inorganic particles and resin, a conductor layer including a seed layer and an electrolytic plating layer such that the conductor layer includes signal wirings, and a via conductor formed in an opening formed in the resin insulating layer and including the seed layer and electrolytic plating layer extending from the conductor layer. The core substrate includes a through-hole conductor formed such that the core substrate has a through hole penetrating through the glass substrate and the through-hole conductor is formed in the through hole, the via conductor is electrically connected to the through-hole conductor formed in the core substrate, and the resin insulating layer is formed such that the surface upon which the conductor layer is formed includes the resin and an inner wall surface in the opening includes the resin and inorganic particles.
    Type: Application
    Filed: February 20, 2024
    Publication date: August 22, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Toshiki FURUTANI, Masashi KUWABARA, Susumu KAGOHASHI
  • Publication number: 20240268038
    Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer including glass particles and resin, a second conductor layer formed on a surface of the resin insulating layer and including a seed layer and an electrolytic plating layer, and a via conductor connecting the first conductor layer and second conductor layer and including the seed layer and electrolytic plating layer extending from the second conductor layer. The second conductor layer and the via conductor are formed such that the second conductor layer includes signal wirings and that the seed layer is formed by sputtering an alloy including copper, aluminum, and one or more metals selected from nickel, zinc, gallium, silicon, and magnesium, and the resin insulating layer is formed such that the surface of the resin insulating layer includes the resin and that an inner wall surface in the opening includes the resin and the glass particles.
    Type: Application
    Filed: February 7, 2024
    Publication date: August 8, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Susumu KAGOHASHI, Jun SAKAI, Kyohei YOSHIKAWA
  • Publication number: 20240268021
    Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer including inorganic particles and resin, a second conductor layer including a seed layer and an electrolytic plating layer, and a via conductor connecting the first conductor layer and second conductor layer and including the seed layer and electrolytic plating layer extending from the second conductor layer. The inorganic particles include first particles, second particles, third particles and fourth particles formed such that the first and second particles are solid particles, the third and fourth particles are hollow particles, the first and third particles form an inner wall surface of the opening in the resin insulating layer, the second and fourth particles are embedded in the resin insulating layer, the first particles have shapes that are different from shapes of the second particles, and the third particles have shapes that are different from shapes of the fourth particles.
    Type: Application
    Filed: February 7, 2024
    Publication date: August 8, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Susumu KAGOHASHI, Kiyohiro ISHIKAWA
  • Publication number: 20240251510
    Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer, a second conductor layer, and a via conductor formed in an opening of the insulating layer and connecting the first conductor and second conductor layers. The second conductor layer and via conductor include a seed layer having a first portion formed on the surface of the insulating layer, a second portion formed on an inner wall surface in the opening, and a third portion formed on a portion of the first conductor layer exposed by the opening. A thickness of the first portion is greater than a thickness of the second portion and a thickness of the third portion. The seed layer includes a first layer including an alloy including copper, aluminum and one or more metals selected from nickel, zinc, gallium, silicon, and magnesium, and a second layer formed on the first layer and including copper.
    Type: Application
    Filed: January 24, 2024
    Publication date: July 25, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Susumu KAGOHASHI, Jun SAKAI, Kyohei YOSHIKAWA
  • Publication number: 20240237201
    Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on a surface of the resin insulating layer and including a signal wiring, and a via conductor formed in the resin insulating layer such that the via conductor is connecting the first conductor layer and the second conductor layer. The resin insulating layer has an opening such that the opening is exposing a portion of the first conductor layer and that the via conductor is formed in the opening of the resin insulating layer, and the resin insulating layer includes inorganic particles and resin such that the resin is forming the surface of the resin insulating layer.
    Type: Application
    Filed: March 27, 2024
    Publication date: July 11, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Susumu KAGOHASHI, Maaya TOMIDA
  • Publication number: 20240203891
    Abstract: A wiring substrate includes a first build-up part including first insulating layers, first conductor layers formed on the first insulating layers, and first via conductors formed in the first insulating layers, and a second build-up part laminated to the first build-up part and including second insulating layers, second conductor layers formed on the second insulating layers, and second via conductors formed in the second insulating layers. A wiring width and an inter-wiring distance of wirings in the first conductor layers of the first build-up part are smaller than a wiring width and an inter-wiring distance of wirings in the second conductor layers of the second build-up part, and the first build-up part is formed such that the first insulating layers include insulating resin and inorganic particles and that the insulating resin in the first insulating layers forms the surfaces of the first insulating layers covered by the first conductor layers.
    Type: Application
    Filed: December 19, 2023
    Publication date: June 20, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Toshiki FURUTANI, Masashi KUWABARA, Susumu KAGOHASHI
  • Publication number: 20240196526
    Abstract: A wiring substrate includes insulating layers including inorganic particles and resin, conductor layers formed on first surfaces of the insulating layers, respectively, and including the outermost conductor layer and a conductor layer, and via conductors formed in the insulating layers such that the via conductors are connecting the conductor layers formed on the first surfaces of the insulating layers. The conductor layers are formed such that the outermost conductor layer includes first conductor pads positioned to mount a first component and second conductor pads positioned to mount a second component and that the conductor layer includes first wiring patterns connecting the first conductor pads and the second conductor pads, and the insulating layers are formed such that the first surfaces of the insulating layers are formed of the resin and do not have exposed surfaces of the inorganic particles.
    Type: Application
    Filed: November 29, 2023
    Publication date: June 13, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Toshiki FURUTANI, Masashi KUWABARA, Susumu KAGOHASHI
  • Publication number: 20240179853
    Abstract: A wiring substrate includes an insulating layer including inorganic particles and resin, a seed layer formed on a surface of the insulating layer, and a conductor layer including a conductor pattern and formed on the seed layer. The surface of the insulating layer is a roughened surface formed such that the roughened surface of the insulating layer has exposed portions of the inorganic particles and resin with gaps at interfaces where the inorganic particles and the resin are in contact, and the seed layer is formed on the roughened surface of the insulating layer such that the seed layer is formed along the exposed portions of the inorganic particles and resin exposed on the roughened surface of the insulating layer and is not formed in the gaps at the interfaces where the inorganic particles and the resin are in contact.
    Type: Application
    Filed: November 27, 2023
    Publication date: May 30, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Susumu KAGOHASHI, Jun SAKAI
  • Publication number: 20240107684
    Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer having an opening, a second conductor layer including a seed layer and an electrolytic plating layer formed on the seed layer, and a via conductor including the seed and electrolytic plating layers and connecting the first and second conductor layers. The seed layer has a first portion on the surface of the insulating layer, a second portion on an inner wall surface in the opening of the insulating layer, and a third portion on a portion of the first conductor layer exposed by the opening of the insulating layer such that the first portion is thicker than the second and third portions, and the insulating layer includes resin and inorganic particles including first particles forming the inner wall surface and second particles embedded in the insulating layer and having shapes different from shapes of the first particles.
    Type: Application
    Filed: September 27, 2023
    Publication date: March 28, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Jun SAKAI, Takuya INISHI, Susumu KAGOHASHI