Patents by Inventor Susumu Nishihashi
Susumu Nishihashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8265087Abstract: A gateway apparatus for performing transfer control of frame data between communication channels includes a routing map that stores ID information about the frame data and information about a communication channel that uses the ID information, and a search engine unit that routes the frame data to a transfer destination on the basis of the ID information of the frame data received and the routing map. The search engine unit does not transfer the frame data to the transfer destination when the ID information about the frame data received is ID information that is not used in the communication channel through which the frame data is received.Type: GrantFiled: October 26, 2007Date of Patent: September 11, 2012Assignees: Fujitsu Ten Limited, Fujitsu Semiconductor Limited, Renesas Electronics CorporationInventors: Kaoru Noumi, Susumu Nishihashi, Tomoyuki Katou, Yukio Ishikawa, Yasuyuki Umezaki, Hidetaka Ebeshu, Shigeo Koide, Yukio Fujisawa, Hiroaki Shimauchi
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Patent number: 8122316Abstract: An error detector has a parity bit generator which generates error detection data for data strings sent from a CPU I/F to a memory, a parity checker which detects an error in the data strings output from the memory based on the error detection data, and a selector circuit which switchingly outputs the data from the parity bit generator and the data from a CPU which sends diagnostic data. While the selector circuit is switched to output the data from the CPU, based on the error detection data output from the selector circuit, the error detector conducts a failure diagnosis of error detection functions including at least one of the parity bit generator and the parity checker.Type: GrantFiled: October 25, 2007Date of Patent: February 21, 2012Assignees: Fujitsu Ten Limited, Fujitsu Semiconductor Limited, Renesas Electronics CorporationInventors: Kaoru Noumi, Susumu Nishihashi, Tomoyuki Katou, Yukio Ishikawa, Yasuyuki Umezaki, Hidetaka Ebeshu, Shigeo Koide, Yukio Fujisawa, Hiroaki Shimauchi
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Patent number: 8041747Abstract: A data search device that is provided in a communication apparatus detects a memory area storing data to be transmitted from a memory unit having memory areas defined by IDs allotted to data. The data search device includes: a first flag that is provided for each of the memory areas of the memory unit, and indicate whether the data in the corresponding memory area is updated; a second flag that is provided for each group consisting of a predetermined number of the first flags, and indicates a data update state when at least one set of data in the first flags in the corresponding group indicates an updated state; and a search control unit that detects the memory area storing the data to be transmitted, by searching for the corresponding first flag after detecting the second flag.Type: GrantFiled: February 19, 2009Date of Patent: October 18, 2011Assignees: Fujitsu Ten Limited, Toyota Jidosha Kabushiki KaishaInventors: Susumu Nishihashi, Shinji Yamashita, Kenji Hontani, Yukio Fujisawa, Satoshi Yamanaka, Hiroaki Shimauchi
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Patent number: 8027352Abstract: A gateway apparatus for performing transfer control of frame data between a plurality of different communication channels is provided with a time stamp unit for adding time stamp information to received frame data and a data discarding unit for determining processing delay of the frame data or abnormality of the apparatus by referring to the time stamp information and for deleting the time stamp information added to the frame data at the time of sending the frame data.Type: GrantFiled: October 25, 2007Date of Patent: September 27, 2011Assignees: Fujitsu Semiconductor Limited, Renesas Technology CorporationInventors: Kaoru Noumi, Susumu Nishihashi, Tomoyuki Katou, Yukio Ishikawa, Yasuyuki Umezaki, Hidetaka Ebeshu, Shigeo Koide, Yukio Fujisawa, Hiroaki Shimauchi
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Patent number: 7801173Abstract: A communication conversion apparatus achieve efficient conversion without conversion delay and converts messages that effect communication with different communication protocols and schedules. In a message conversion apparatus that performs message conversion of different communication protocols, a routing circuit and a scheduler circuits that perform scheduling of the different communication protocols are separately provided. And time-triggered scheduling and event-triggered scheduling are separately performed. Conversion of FlexRay and CAN messages can be efficiently implemented.Type: GrantFiled: December 12, 2006Date of Patent: September 21, 2010Assignee: Fujitsu Ten LimitedInventors: Tsuyoshi Takatori, Kaoru Noumi, Susumu Nishihashi, Tomohide Kasame, Yukio Ishikawa, Satoshi Fukui, Kokoro Hayashi
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Patent number: 7787479Abstract: There is provided a gateway apparatus that controls a forwarding process of frame data between multiple communication channels, said gateway apparatus including a search engine that is respectively provided for each of the multiple communication channels to route the frame data between the multiple communication channels, and a first storage portion that is respectively provided for each of the multiple communication channels to temporarily stores the frame data routed.Type: GrantFiled: April 27, 2006Date of Patent: August 31, 2010Assignees: Fujitsu Ten Limited, Fujitsu LimitedInventors: Tomohiro Matsuo, Tsuyoshi Takatori, Kaoru Noumi, Susumu Nishihashi, Tomohide Kasame, Yukio Ishikawa, Junji Takahashi, Yasuyuki Umezaki, Akiko Furuya, Nobuaki Kawasoe, Naoto Shimoji, Masayoshi Kusumoto
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Publication number: 20090210397Abstract: A data search device that is provided in a communication apparatus detects a memory area storing data to be transmitted from a memory unit having memory areas defined by IDs allotted to data. The data search device includes: a first flag that is provided for each of the memory areas of the memory unit, and indicate whether the data in the corresponding memory area is updated; a second flag that is provided for each group consisting of a predetermined number of the first flags, and indicates a data update state when at least one set of data in the first flags in the corresponding group indicates an updated state; and a search control unit that detects the memory area storing the data to be transmitted, by searching for the corresponding first flag after detecting the second flag.Type: ApplicationFiled: February 19, 2009Publication date: August 20, 2009Applicants: FUJITSU TEN LIMITED, TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Susumu Nishihashi, Shinji Yamashita, Kenji Hontani, Yukio Fujisawa, Satoshi Yamanaka, Hiroaki Shimauchi
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Publication number: 20080141074Abstract: An error detector has a parity bit generator which generates error detection data for data strings sent from a CPU I/F to a memory, a parity checker which detects an error in the data strings output from the memory based on the error detection data, and a selector circuit which switchingly outputs the data from the parity bit generator and the data from a CPU which sends diagnostic data. While the selector circuit is switched to output the data from the CPU, based on the error detection data output from the selector circuit, the error detector conducts a failure diagnosis of error detection functions including at least one of the parity bit generator and the parity checker.Type: ApplicationFiled: October 25, 2007Publication date: June 12, 2008Applicants: FUJITSU TEN LIMITED, FUJITSU LIMITED, RENESAS TECHNOLOGY CORP.Inventors: Kaoru Noumi, Susumu Nishihashi, Tomoyuki Katou, Yukio Ishikawa, Yasuyuki Umezaki, Hidetaka Ebeshu, Shigeo Koide, Yukio Fujisawa, Hiroaki Shimauchi
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Publication number: 20080101393Abstract: A gateway apparatus for performing transfer control of frame data between a plurality of different communication channels is provided with a time stamp unit for adding time stamp information to received frame data and a data discarding unit for determining processing delay of the frame data or abnormality of the apparatus by referring to the time stamp information and for deleting the time stamp information added to the frame data at the time of sending the frame data.Type: ApplicationFiled: October 25, 2007Publication date: May 1, 2008Applicants: FUJITSU TEN LIMITED, FUJITSU LIMITED, RENESAS TECHNOLOGY CORP.Inventors: Kaoru Noumi, Susumu Nishihashi, Tomoyuki Katou, Yukio Ishikawa, Yasuyuki Umezaki, Hidetaka Ebeshu, Shigeo Koide, Yukio Fujisawa, Hiroaki Shimauchi
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Publication number: 20080101394Abstract: A gateway apparatus for performing transfer control of frame data between communication channels includes a routing map that stores ID information about the frame data and information about a communication channel that uses the ID information, and a search engine unit that routes the frame data to a transfer destination on the basis of the ID information of the frame data received and the routing map. The search engine unit does not transfer the frame data to the transfer destination when the ID information about the frame data received is ID information that is not used in the communication channel through which the frame data is received.Type: ApplicationFiled: October 26, 2007Publication date: May 1, 2008Applicants: FUJITSU TEN LIMITED, FUJITSU LIMITED, RENESAS TECHNOLOGY CORPORATIONInventors: Kaoru Noumi, Susumu Nishihashi, Tomoyuki Katou, Yukio Ishikawa, Yasuyuki Umezaki, Hidetaka Ebeshu, Shigeo Koide, Yukio Fujisawa, Hiroaki Shimauchi
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Publication number: 20070140294Abstract: A communication conversion apparatus achieve efficient conversion without conversion delay and converts messages that effect communication with different communication protocols and schedules. In a message conversion apparatus that performs message conversion of different communication protocols, a routing circuit and a scheduler circuits that perform scheduling of the different communication protocols are separately provided. And time-triggered scheduling and event-triggered scheduling are separately performed. Conversion of FlexRay and CAN messages can be efficiently implemented.Type: ApplicationFiled: December 12, 2006Publication date: June 21, 2007Applicant: FUJITSU TEN LIMITEDInventors: Tsuyoshi Takatori, Kaoru Noumi, Susumu Nishihashi, Tomohide Kasame, Yukio Ishikawa, Satoshi Fukui, Kokoro Hayashi
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Publication number: 20060271694Abstract: There is provided a gateway apparatus that controls a forwarding process of frame data between multiple communication channels, said gateway apparatus including a search engine that is respectively provided for each of the multiple communication channels to route the frame data between the multiple communication channels, and a first storage portion that is respectively provided for each of the multiple communication channels to temporarily stores the frame data routed.Type: ApplicationFiled: April 27, 2006Publication date: November 30, 2006Applicants: FUJITSU TEN LIMITED, FUJITSU LIMITEDInventors: Tomohiro Matsuo, Tsuyoshi Takatori, Kaoru Noumi, Susumu Nishihashi, Tomohide Kasame, Yukio Ishikawa, Junji Takahashi, Yasuyuki Umezaki, Akiko Furuya, Nobuaki Kawasoe, Naoto Shimoji, Masayoshi Kusumoto