Abstract: For addressing a problem of a long connecting time of an IC card with an information processing apparatus and a long external power supply time due to storage of data in a non-volatile memory area even after the IC card has completed processing, the present invention provides techniques for notifying the information processing apparatus connected to the IC card of the completion of the processing at the time the IC card has completed the processing, stopping power externally supplied to the IC card, and switching to an internal power supply unit of the IC card. Subsequently, the internal power supply unit is used to transfer data, the contents of which must be ensured from a volatile memory to a non-volatile memory to thereby solve the problem mentioned above.

Abstract: For addressing a problem of a long connecting time of an IC card with an information processing apparatus and a long external power supply time due to storage of data in a non-volatile memory area even after the IC card has completed processing, the present invention provides techniques for notifying the information processing apparatus connected to the IC card of the completion of the processing at the time the IC card has completed the processing, stopping power externally supplied to the IC card, and switching to an internal power supply unit of the IC card. Subsequently, the internal power supply unit is used to transfer data, the contents of which must be ensured from a volatile memory to a non-volatile memory to thereby solve the problem mentioned above.

Abstract: For addressing a problem of a long connecting time of an IC card with an information processing apparatus and a long external power supply time due to storage of data in a non-volatile memory area even after the IC card has completed processing, the present invention provides techniques for notifying the information processing apparatus connected to the IC card of the completion of the processing at the time the IC card has completed the processing, stopping power externally supplied to the IC card, and switching to an internal power supply unit of the IC card. Subsequently, the internal power supply unit is used to transfer data, the contents of which must be ensured from a volatile memory to a non-volatile memory to thereby solve the problem mentioned above.

Abstract: An IC card having a storage memory including a program storage unit for storing a program and a data storage unit for storing data and a central processing unit for executing a predetermined process in accordance with the program to process the data, the program including one or more data process units each having a process instruction for giving an execution instruction to the central processing unit, wherein a data process order is randomly exchanged and a dummy process is added to thereby reduce the dependency of consumption current of an IC chip upon the data process.

Abstract: A relation between the data process contents in an IC card chip and the consumption current of the IC card chip is reduced. Prior to executing an input data process of the IC card chip, the input data is transformed to thereby reduce the relation between the process data and the consumption current of the IC card chip. After the transforming process, the transformed data is untransformed to obtain a correct process result.

Abstract: A relation between the data process contents in an IC card chip and the consumption current of the IC card chip is reduced. Prior to executing an input data process of the IC card chip, the input data is transformed to thereby reduce the relation between the process data and the consumption current of the IC card chip. After the transforming process, the transformed data is untransformed to obtain a correct process result.

Abstract: An IC card having a storage memory including a program storage unit for storing a program and a data storage unit for storing data and a central processing unit for executing a predetermined process in accordance with the program to process the data, the program including one or more data process units each having a process instruction for giving an execution instruction to the central processing unit, wherein a data process order is randomly exchanged and a dummy process is added to thereby reduce the dependency of consumption current of an IC chip upon the data process.

Abstract: For addressing a problem of a long connecting time of an IC card with an information processing apparatus and a long external power supply time due to storage of data in a non-volatile memory area even after the IC card has completed processing, the present invention provides techniques for notifying the information processing apparatus connected to the IC card of the completion of the processing at the time the IC card has completed the processing, stopping power externally supplied to the IC card, and switching to an internal power supply unit of the IC card. Subsequently, the internal power supply unit is used to transfer data, the contents of which must be ensured from a volatile memory to a non-volatile memory to thereby solve the problem mentioned above.

Abstract: Processor apparatuses share data, used in common for a plurality of systems, in a global memory in a share system. The global memory is divided into constant units and the individual division units are managed by using identifiers which are definitely determined as viewed from the processor apparatuses and the share system. When an inter-system exclusive state conditioning unit of a processor apparatus designates a desired area on an address space in the processor apparatus by using an identifier to obtain a locked resource, an update state confirming unit checks whether data in a corresponding unit in the share system is updated, and when the data is updated, a data transferring unit transfers the data in the corresponding unit in the share system to the address space. Accordingly, a program operating on each computer system can easily access the data shared by the systems without being aware of the presence of the share system.

Abstract: A composite computer system which includes a plurality of processors connected to each other by a communication apparatus, an operation supervisory unit for recording operating conditions of the processors when the processors are activated or deactivated, an operation supervisory network for connecting the processors and the operation supervisory unit and a program condition management apparatus for recording operating conditions of programs when the programs of the processors are activated or deactivated. The operation supervisory unit obtains, for fault location purposes, the operating conditions of the processors recorded in the operation supervisory unit via the operation supervisory network and the operating conditions of the programs recorded in the program condition management apparatus.