Patents by Inventor Susumu Sorimachi

Susumu Sorimachi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250038475
    Abstract: A semiconductor laser element includes a plurality of three or more laser resonators integrated adjacent to each other in the first direction. Each laser resonator has an independent power supply electrode, a second direction which is regarded as a longitudinal direction, and an end face which is coated. A plurality of electrode pads are formed in a pad region adjacent to the laser region in the first direction. Each of the wirings for connection extends in the first direction and is electrically connected the power supply electrode of the corresponding laser resonator and the corresponding electrode pad. The thick film pad is formed on the pad region and is higher than the multilayered wiring structure of the wirings for connection.
    Type: Application
    Filed: July 23, 2024
    Publication date: January 30, 2025
    Applicant: Ushio Denki Kabushiki Kaisha
    Inventors: Yutaka INOUE, Shigeta SAKAI, Susumu SORIMACHI
  • Patent number: 10840671
    Abstract: Disclosed herein is a semiconductor laser device utilizing a monocrystalline SiC substrate that is capable of assuring a sufficient heat dissipation property. The semiconductor laser device comprises: a monocrystalline SiC substrate having an electrical conductivity, the substrate having a first surface and a second surface; and a semiconductor laser chip (LD chip) arranged on the first surface. Also, the semiconductor laser device may comprise an insulating film arranged at a side of the first surface of the SiC substrate and configured to insulate a first electric conductive layer onto which the semiconductor laser chip is mounted and an electric conductive member (a second electric conductive layer and a heatsink portion) to be joined to a side of the second surface of the SiC substrate.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: November 17, 2020
    Assignee: USHIO DENKI KABUSHIKI KAISHA
    Inventors: Masato Hagimoto, Susumu Sorimachi, Tomonobu Tsuchiya
  • Publication number: 20180278015
    Abstract: Disclosed herein is a semiconductor laser device utilizing a monocrystalline SiC substrate that is capable of assuring a sufficient heat dissipation property. The semiconductor laser device comprises: a monocrystalline SiC substrate having an electrical conductivity, the substrate having a first surface and a second surface; and a semiconductor laser chip (LD chip) arranged on the first surface. Also, the semiconductor laser device may comprise an insulating film arranged at a side of the first surface of the SiC substrate and configured to insulate a first electric conductive layer onto which the semiconductor laser chip is mounted and an electric conductive member (a second electric conductive layer and a heatsink portion) to be joined to a side of the second surface of the SiC substrate.
    Type: Application
    Filed: March 26, 2018
    Publication date: September 27, 2018
    Applicant: USHIO OPTO SEMICONDUCTORS, INC.
    Inventors: Masato HAGIMOTO, Susumu SORIMACHI, Tomonobu TSUCHIYA
  • Patent number: 8442085
    Abstract: By forming upper-bank patterns made of Au with a thickness of 1.5 ?m or larger on bank portions, a solder material on a submount and a surface of a conductive layer in an upper part of a ridge portion of a laser chip are separated so as not to be in contact with each other, thereby preventing the stress generated in a bonding portion when bonding the laser chip and the submount from being applied to the ridge portion.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: May 14, 2013
    Assignee: Oclaro Japan, Inc.
    Inventors: Susumu Sorimachi, Yutaka Inoue, Yasuhisa Semba
  • Publication number: 20110116526
    Abstract: By forming upper-bank patterns made of Au with a thickness of 1.5 ?m or larger on bank portions, a solder material on a submount and a surface of a conductive layer in an upper part of a ridge portion of a laser chip are separated so as not to be in contact with each other, thereby preventing the stress generated in a bonding portion when bonding the laser chip and the submount from being applied to the ridge portion.
    Type: Application
    Filed: November 18, 2010
    Publication date: May 19, 2011
    Inventors: Susumu SORIMACHI, Yutaka Inoue, Yasuhisa Semba
  • Patent number: 7792173
    Abstract: In a multi-beam semiconductor laser device, relative difference in shear strain applied to each of light-emitting portions of a laser chip mounted on a submount is suppressed, thereby reducing relative difference in polarization angle. A semiconductor laser element array mounted on a submount has a structure in which a semiconductor layer having two ridge portions is stacked on a substrate, and Au plating layers are formed on the surfaces of p type electrodes formed on the ridge portions. In each of the ridge portions, a central position of the Au plating layer in a width direction is intentionally displaced with respect to a central position of the underlying light-emitting portion in a width direction, so that shear strain is applied to each of the light-emitting portions at a stage before the semiconductor laser element array is mounted on the submount.
    Type: Grant
    Filed: December 4, 2008
    Date of Patent: September 7, 2010
    Assignee: Opnext Japan, Inc.
    Inventors: Yoshihiko Iga, Yutaka Inoue, Hiroshi Moriya, Yasuhisa Semba, Susumu Sorimachi
  • Patent number: 7720127
    Abstract: An opto-semiconductor device. An opto-semiconductor element includes a semiconductor substrate, a multilayered semiconductor layer formed on a first surface of the semiconductor substrate and having a resonator, a first electrode with multiple conductive layers formed on the multilayered semiconductor layer, and a second electrode formed on a second surface of the semiconductor substrate. A support substrate has a first surface formed with a fixing portion having a conductive layer for fixing the first electrode connected thereto through a bonding material. Bonding material and conductive layers forming the first electrode react to form a reaction layer. The difference in thermal expansion coefficient between semiconductor substrate and support substrate is not more than ±50%. A second barrier metal layer not reactive with bonding material is formed inside the first electrode uppermost conductive layer, while uppermost layer reacts with the bonding material to form the reaction layer.
    Type: Grant
    Filed: September 22, 2008
    Date of Patent: May 18, 2010
    Assignee: OpNext Japan, Inc.
    Inventors: Yutaka Inoue, Kazunori Saitoh, Hiroshi Hamada, Masato Hagimoto, Susumu Sorimachi
  • Patent number: 7687295
    Abstract: In an optical semiconductor device that emits or receives light substantially perpendicularly to or in parallel to an active surface formed on a semiconductor substrate, the optical semiconductor device, an electrode that is formed on the active surface side and connected to the active surface is stepped or tapered at an end of the electrode. The electrode of the optical semiconductor device is formed of three layers including an adhesive layer, a diffusion prevention layer, and an Au layer, and the stepped configuration or the taped configuration is formed by a difference of the thickness of the Au layer or the thickness of the adhesive layer/diffusion prevention layer/Au layer.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: March 30, 2010
    Assignee: Opnext Japan, Inc.
    Inventors: Ryu Washino, Susumu Sorimachi, Daisuke Nakai, Kaoru Okamoto, Shigenori Hayakawa
  • Patent number: 7653114
    Abstract: A multibeam semiconductor laser diode having: an n-type semiconductor substrate; an n-type clad layer, an active layer, a p-type clad layer and a contact layer; a plurality of partitioning grooves extending from one end to the other end of the substrate and formed from the contact layer to a predetermined depth of the p-type clad layer; a stripe-shaped ridge sandwiched between two separation grooves; an insulating layer covering an area from each side wall of the contact layer of each ridge to an end of the partitioning region via the separation groove; a first electrode formed on a second plane of the substrate; and a second electrode formed in each partitioning region covering an area above the ridge, separation grooves and multilayer semiconductor layers outside the separation grooves, the second electrode being constituted of a lower second electrode layer and an upper second plated layer.
    Type: Grant
    Filed: May 22, 2008
    Date of Patent: January 26, 2010
    Assignee: Opnext Japan, Inc.
    Inventors: Yutaka Inoue, Yasuhisa Semba, Susumu Sorimachi, Kouichi Kouzu
  • Publication number: 20090147816
    Abstract: In a multi-beam semiconductor laser device, relative difference in shear strain applied to each of light-emitting portions of a laser chip mounted on a submount is suppressed, thereby reducing relative difference in polarization angle. A semiconductor laser element array mounted on a submount has a structure in which a semiconductor layer having two ridge portions is stacked on a substrate, and Au plating layers are formed on the surfaces of p type electrodes formed on the ridge portions. In each of the ridge portions, a central position of the Au plating layer in a width direction is intentionally displaced with respect to a central position of the underlying light-emitting portion in a width direction, so that shear strain is applied to each of the light-emitting portions at a stage before the semiconductor laser element array is mounted on the submount.
    Type: Application
    Filed: December 4, 2008
    Publication date: June 11, 2009
    Inventors: Yoshihiko IGA, Yutaka Inouke, Hiroshi Moriya, Yasuhisa Semba, Susumu Sorimachi
  • Publication number: 20090041076
    Abstract: An opto-semiconductor device. An opto-semiconductor element includes a semiconductor substrate, a multilayered semiconductor layer formed on a first surface of the semiconductor substrate and having a resonator, a first electrode with multiple conductive layers formed on the multilayered semiconductor layer, and a second electrode formed on a second surface of the semiconductor substrate. A support substrate has a first surface formed with a fixing portion having a conductive layer for fixing the first electrode connected thereto through a bonding material. Bonding material and conductive layers forming the first electrode react to form a reaction layer. The difference in thermal expansion coefficient between semiconductor substrate and support substrate is not more than 50%. A second barrier metal layer not reactive with bonding material is formed inside the first electrode uppermost conductive layer, while uppermost layer reacts with the bonding material to form the reaction layer.
    Type: Application
    Filed: September 22, 2008
    Publication date: February 12, 2009
    Inventors: Yutaka Inoue, Kazunori Saitoh, Hiroshi Hamada, Masato Hagimoto, Susumu Sorimachi
  • Publication number: 20080291960
    Abstract: A multibeam semiconductor laser diode having: an n-type semiconductor substrate; an n-type clad layer, an active layer, a p-type clad layer and a contact layer; a plurality of partitioning grooves extending from one end to the other end of the substrate and formed from the contact layer to a predetermined depth of the p-type clad layer; a stripe-shaped ridge sandwiched between two separation grooves; an insulating layer covering an area from each side wall of the contact layer of each ridge to an end of the partitioning region via the separation groove; a first electrode formed on a second plane of the substrate; and a second electrode formed in each partitioning region covering an area above the ridge, separation grooves and multilayer semiconductor layers outside the separation grooves, the second electrode being constituted of a lower second electrode layer and an upper second plated layer.
    Type: Application
    Filed: May 22, 2008
    Publication date: November 27, 2008
    Inventors: Yutaka Inoue, Yasuhisa Semba, Susumu Sorimachi, Kouichi Kouzu
  • Patent number: 7443901
    Abstract: An opto-semiconductor device. An opto-semiconductor element includes a semiconductor substrate, a multilayered semiconductor layer formed on a first surface of the semiconductor substrate and having a resonator, a first electrode with multiple conductive layers formed on the multilayered semiconductor layer, and a second electrode formed on a second surface of the semiconductor substrate. A support substrate has a first surface formed with a fixing portion having a conductive layer for fixing the first electrode connected thereto through a bonding material. Bonding material and conductive layers forming the first electrode react to form a reaction layer. The difference in thermal expansion coefficient between semiconductor substrate and support substrate is not more than ±50%. A second barrier metal layer not reactive with bonding material is formed inside the first electrode uppermost conductive layer, while uppermost layer reacts with the bonding material to form the reaction layer.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: October 28, 2008
    Assignee: OpNext Japan, Inc.
    Inventors: Yutaka Inoue, Kazunori Saitoh, Hiroshi Hamada, Masato Hagimoto, Susumu Sorimachi
  • Publication number: 20080203404
    Abstract: In an optical semiconductor device that emits or receives light substantially perpendicularly to or in parallel to an active surface formed on a semiconductor substrate, the optical semiconductor device, an electrode that is formed on the active surface side and connected to the active surface is stepped or tapered at an end of the electrode. The electrode of the optical semiconductor device is formed of three layers including an adhesive layer, a diffusion prevention layer, and an Au layer, and the stepped configuration or the taped configuration is formed by a difference of the thickness of the Au layer or the thickness of the adhesive layer/diffusion prevention layer/Au layer.
    Type: Application
    Filed: January 31, 2008
    Publication date: August 28, 2008
    Inventors: Ryu Washino, Susumu Sorimachi, Daisuke Nakai, Kaoru Okamoto, Shigenori Hayakawa
  • Publication number: 20060222031
    Abstract: An opto-semiconductor device. An opto-semiconductor element includes a semiconductor substrate, a multilayered semiconductor layer formed on a first surface of the semiconductor substrate and having a resonator, a first electrode with multiple conductive layers formed on the multilayered semiconductor layer, and a second electrode formed on a second surface of the semiconductor substrate. A support substrate has a first surface formed with a fixing portion having a conductive layer for fixing the first electrode connected thereto through a bonding material. Bonding material and conductive layers forming the first electrode react to form a reaction layer. The difference in thermal expansion coefficient between semiconductor substrate and support substrate is not more than ±50%. A second barrier metal layer not reactive with bonding material is formed inside the first electrode uppermost conductive layer, while uppermost layer reacts with the bonding material to form the reaction layer.
    Type: Application
    Filed: March 24, 2006
    Publication date: October 5, 2006
    Inventors: Yutaka Inoue, Kazunori Saitoh, Hiroshi Hamada, Masato Hagimoto, Susumu Sorimachi
  • Patent number: 6492195
    Abstract: Disclosed herein is a technique which performs the thinning of a wafer and the separation thereof from a support substrate with high yields and in a short time. Described specifically, a hole-free support substrate is bonded to a second surface of a support substrate having holes with an adhesive layer melted by heating so as to bloc the holes. A wafer is bonded to a first surface of the support substrate having the holes with an adhesive layer melted by solvent. The wafer is thinned by grinding and etching. The adhesive layer is melted by heating and the support substrate having the holes is slid with respect to the hole-free support substrate to thereby separate the support substrate having the holes from the hole-free support substrate. Further, the adhesive layer is melted by solvent from the holes defined in the support substrate having the holes to thereby separate the wafer from the support substrate having the holes.
    Type: Grant
    Filed: December 13, 2000
    Date of Patent: December 10, 2002
    Assignees: Hitachi, Ltd., Hitachi Tohbu Semiconductor, Ltd.
    Inventors: Masaki Nakanishi, Susumu Sorimachi, Kiichi Yamashita, Hiroji Yamada, Kikuo Fukushima
  • Publication number: 20010005043
    Abstract: Disclosed herein is a technique which performs the thinning of a wafer and the separation thereof from a support substrate with high yields and in a short time. Described specifically, a hole-free support substrate is bonded to a second surface of a support substrate having holes with an adhesive layer melted by heating so as to bloc the holes. A wafer is bonded to a first surface of the support substrate having the holes with an adhesive layer melted by solvent. The wafer is thinned by grinding and etching. The adhesive layer is melted by heating and the support substrate having the holes is slid with respect to the hole-free support substrate to thereby separate the support substrate having the holes from the hole-free support substrate. Further, the adhesive layer is melted by solvent from the holes defined in the support substrate having the holes to thereby separate the wafer from the support substrate having the holes.
    Type: Application
    Filed: December 13, 2000
    Publication date: June 28, 2001
    Inventors: Masaki Nakanishi, Susumu Sorimachi, Kiichi Yamashita, Hiroji Yamada, Kikuo Fukushima