Patents by Inventor Susumu Sugano
Susumu Sugano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11241809Abstract: A molding die and a molding method are provided, which allow high-cycle manufacturing of molded bodies of a thermoplastic resin or thermoplastic resin-fiber composite material, thereby improving productivity. Molding is performed using a molding die including a plurality of die portions that form a cavity in which a molded body is molded, the molding die including: a first temperature adjusting unit disposed in the vicinity of the cavity surface and capable of at least cooling the cavity surface; and a second temperature adjusting unit disposed on a side of the first temperature adjusting unit opposite from the cavity surface and capable of at least heating the cavity surface, wherein a distance L0 from the cavity surface to the first temperature adjusting unit and a distance L1 from the cavity surface to a surface of the corresponding die portion opposite from the cavity surface satisfy the relationship: (L1/L0)>3.Type: GrantFiled: April 13, 2017Date of Patent: February 8, 2022Assignee: Asahi Kasei Kabushiki KaishaInventors: Kazuharu Yasuda, Yuo Umei, Hideaki Ichiki, Susumu Sugano
-
Publication number: 20190126521Abstract: A molding die and a molding method are provided, which allow high-cycle manufacturing of molded bodies of a thermoplastic resin or thermoplastic resin-fiber composite material, thereby improving productivity. Molding is performed using a molding die including a plurality of die portions that form a cavity in which a molded body is molded, the molding die including: a first temperature adjusting unit disposed in the vicinity of the cavity surface and capable of at least cooling the cavity surface; and a second temperature adjusting unit disposed on a side of the first temperature adjusting unit opposite from the cavity surface and capable of at least heating the cavity surface, wherein a distance L0 from the cavity surface to the first temperature adjusting unit and a distance L1 from the cavity surface to a surface of the corresponding die portion opposite from the cavity surface satisfy the relationship: (L1/L0)>3.Type: ApplicationFiled: April 13, 2017Publication date: May 2, 2019Applicant: Asahi Kasei Kabushiki KaishaInventors: Kazuharu YASUDA, Yuo UMEI, Hideaki ICHIKI, Susumu SUGANO
-
Patent number: 10269554Abstract: In order to reduce edge defects efficiently and sufficiently, a method for manufacturing a SiC epitaxial wafer according to the present invention is a method for manufacturing a SiC epitaxial wafer that forms a SiC epitaxial layer on top of a SiC single crystal substrate having an off angle, and includes a rough polishing step for subjecting an outer circumferential edge on a starting side of step-flow growth in the SiC single crystal substrate to rough polishing before forming the SiC epitaxial layer; and a final polishing step for further polishing for finish.Type: GrantFiled: June 19, 2015Date of Patent: April 23, 2019Assignee: SHOWA DENKO K.K.Inventors: Yuzo Sasaki, Susumu Sugano
-
Publication number: 20170221697Abstract: In order to reduce edge defects efficiently and sufficiently, a method for manufacturing a SiC epitaxial wafer according to the present invention is a method for manufacturing a SiC epitaxial wafer that forms a SiC epitaxial layer on top of a SiC single crystal substrate having an off angle, and includes a rough polishing step for subjecting an outer circumferential edge on a starting side of step-flow growth in the SiC single crystal substrate to rough polishing before forming the SiC epitaxial layer; and a final polishing step for further polishing for finish.Type: ApplicationFiled: June 19, 2015Publication date: August 3, 2017Applicant: SHOWA DENKO K.K.Inventors: Yuzo SASAKI, Susumu SUGANO
-
Patent number: 8927348Abstract: Provided are a method of manufacturing a group-III nitride semiconductor light-emitting device in which a light-emitting device excellent in the internal quantum efficiency and the light extraction efficiency can be obtained, a group-III nitride semiconductor light-emitting device and a lamp. Included are an epitaxial step of forming a semiconductor layer (30) so as to a main surface (20) of a substrate (2), a masking step of forming a protective film on the semiconductor layer (30), a semiconductor layer removal step of removing the protective film and the semiconductor layer (30) by laser irradiation to expose the substrate (2), a grinding step of reducing the thickness of the substrate (2), a polishing step of polishing the substrate (2), a laser processing step of providing processing marks to the inside of the substrate (2), a division step of creating a plurality of light-emitting devices (1) while forming a division surface of the substrate (2) to have a rough surface.Type: GrantFiled: May 12, 2009Date of Patent: January 6, 2015Assignee: Toyoda Gosei Co., Ltd.Inventors: Susumu Sugano, Hisayuki Miki, Hironao Shinohara
-
Patent number: 8637336Abstract: A method of producing a semiconductor wafer, which includes: placing a wafer (10) provided with a substrate (11) and a semiconductor layer (20) formed thereon, on a carrier plate (fixing plate) (31) of a grinder via fixing wax (33a and 33b) such that the surface (10a) to be ground faces upward; heating the carrier plate to soften the fixing wax; pressure-contacting the wafer from the side of the surface (10a) to be ground using an air bag such that a portion of the softened fixing wax spreads and protrudes from the peripheral edge of the wafer; cooling the carrier plate while applying pressure to cure the fixing wax and fix the wafer onto the carrier plate; and rotating the surface (10a) to be ground of the fixed wafer while pressure-contacting the surface (10a) to the grinding plate of the grinder, thereby grinding the surface (10a) to be ground.Type: GrantFiled: January 14, 2011Date of Patent: January 28, 2014Assignee: Toyoda Gosei Co., Ltd.Inventor: Susumu Sugano
-
Patent number: 8470691Abstract: An image pickup section picks up images of a pair of targets formed on a substrate with a cutting line interposed therebetween (S101). An extracting section extracts the targets from the images (S102). Then, a measuring section measures the distance d1 between the targets (S103). When a driving section presses a blade against the substrate (S104), the substrate is pressed by the blade to become warped and starts to break. Thus, the image pickup section picks up images of the targets again (S105), and the extracting section extracts the targets from the images (S106). The measuring section measures the distance d2 between the targets (S107). A determining section determines the cutting state of the substrate from the amount of change (d2?d1) of the distances between the targets (S108).Type: GrantFiled: January 19, 2010Date of Patent: June 25, 2013Assignee: Toyoda Gosei Co., Ltd.Inventors: Yoshiharu Saegusa, Susumu Sugano
-
Publication number: 20120295383Abstract: Disclosed is a method of producing a semiconductor wafer, which includes: placing a wafer (10), which is provided with a substrate (11) and a semiconductor layer (20) formed on the substrate (11), on a carrier plate (fixing plate) (31) of a grinder via fixing wax (33a and 33b) in a manner such that the surface (10a) to be ground of the wafer (10) faces upward; heating the carrier plate (31), on which the wafer (10) is placed, in order to soften the fixing wax (33a and 33b); pressure-contacting the wafer (10) from the side of the surface (10a) to be ground by means of an air bag in a manner such that a portion of the softened fixing wax (33a and 33b) spreads and protrudes from the peripheral edge of the wafer (10); cooling the carrier plate (31) while applying pressure to the wafer (10) in order to cure the fixing wax (33a and 33b) and fix the wafer (10) onto the carrier plate (31); and rotating the surface (10a) to be ground of the fixed wafer (10) while pressure-contacting the surface (10a) to the grinding pType: ApplicationFiled: January 14, 2011Publication date: November 22, 2012Applicant: SHOWA DENKO K.K.Inventor: Susumu Sugano
-
Publication number: 20110287608Abstract: An image pickup section picks up images of a pair of targets formed on a substrate with a cutting line interposed therebetween (S101). An extracting section extracts the targets from the images (S102). Then, a measuring section measures the distance d1 between the targets (S103). When a driving section presses a blade against the substrate (S104), the substrate is pressed by the blade to become warped and starts to break. Thus, the image pickup section picks up images of the targets again (S105), and the extracting section extracts the targets from the images (S106). The measuring section measures the distance d2 between the targets (S107). A determining section determines the cutting state of the substrate from the amount of change (d2?d1) of the distances between the targets (S108).Type: ApplicationFiled: January 19, 2010Publication date: November 24, 2011Applicant: SHOWA DENKO K.K.Inventors: Yoshiharu Saegusa, Susumu Sugano
-
Publication number: 20110204412Abstract: Provided is a method for manufacturing a semiconductor light emitting element, by which semiconductor light emitting elements having excellent light extraction efficiency can be manufactured at high yield.Type: ApplicationFiled: October 23, 2009Publication date: August 25, 2011Applicant: SHOWA DENKO K.K.Inventor: Susumu Sugano
-
Publication number: 20110062479Abstract: Provided are a method of manufacturing a group-III nitride semiconductor light-emitting device in which a light-emitting device excellent in the internal quantum efficiency and the light extraction efficiency can be obtained, a group-III nitride semiconductor light-emitting device and a lamp. Included are an epitaxial step of forming a semiconductor layer (30) so as to a main surface (20) of a substrate (2), a masking step of forming a protective film on the semiconductor layer (30), a semiconductor layer removal step of removing the protective film and the semiconductor layer (30) by laser irradiation to expose the substrate (2), a grinding step of reducing the thickness of the substrate (2), a polishing step of polishing the substrate (2), a laser processing step of providing processing marks to the inside of the substrate (2), a division step of creating a plurality of light-emitting devices (1) while forming a division surface of the substrate (2) to have a rough surface.Type: ApplicationFiled: May 12, 2009Publication date: March 17, 2011Applicant: SHOWA DENKO K.K.Inventors: Susumu Sugano, Hisayuki Miki, Hironao Shinohara
-
Publication number: 20110034112Abstract: A polishing apparatus, a polishing method and a polishing auxiliary apparatus which are able to suppress clogging of the rotating grindstone and polish the work while suppressing the damage thereof are provided.Type: ApplicationFiled: April 10, 2009Publication date: February 10, 2011Applicant: Showa Denko K.K.Inventor: Susumu Sugano