Abstract: An electric power supply apparatus includes a power-supply unit that supplies LNB driving electric power through an electric power line to an LNB (Low Noise Block down converter) in compliance with the DiSEqC (Digital Satellite Equipment Control) standard; a transmission unit that transmits a control command for a DiSEqC apparatus through the electric power line; a receiving unit that receives a response from the DiSEqC apparatus corresponding to the control command through the electric power line; and a suppression unit that suppresses a level of noise that can occur in response to a switching of the switching unit that switches between a TX mode in which the control command is transmitted and an RX mode in which a response is received.

Abstract: The present invention relates to a video-signal processing system, a video-signal processing apparatus and method, a recording medium, and a program for immediately recovering from loss of synchronization while encrypting/decrypting a video signal. An encryption processing unit 22 encrypts a frame number Tx, which has been obtained by counting vertical control pulses of a video signal, and transmits the frame number Tx together with an unencrypted frame number Tx and an H/V control pulse. A decryption processing unit 32 decrypts the encrypted frame number Tx so as to generate a frame number Rx and supplies the frame number Rx together with the frame number Tx and the vertical control pulses to a correcting unit 33. The correcting unit 33 generates a pseudo load pulse when the frame numbers Tx and Rx do not match with each other 16 consecutive times, and supplies the pseudo load pulse to the encryption processing unit 22 and the decryption processing unit 32.

Abstract: The present invention relates to a video-signal processing system, a video-signal processing apparatus and method, a recording medium, and a program for immediately recovering from loss of synchronization while encrypting/decrypting a video signal. An encryption processing unit 22 encrypts a frame number Tx, which has been obtained by counting vertical control pulses of a video signal, and transmits the frame number Tx together with an unencrypted frame number Tx and an H/V control pulse. A decryption processing unit 32 decrypts the encrypted frame number Tx so as to generate a frame number Rx and supplies the frame number Rx together with the frame number Tx and the vertical control pulses to a correcting unit 33. The correcting unit 33 generates a pseudo load pulse when the frame numbers Tx and Rx do not match with each other 16 consecutive times, and supplies the pseudo load pulse to the encryption processing unit 22 and the decryption processing unit 32.

Abstract: A driving apparatus for a plasma addressed liquid crystal display has a reference voltage selection D/A converter (27) for applying a driving voltage to a first transparent scanning electrode group, a common anode inversion driving voltage generator (30) for applying a common anode inversion driving voltage obtained by relatively inverting a driving voltage to a second electrode scanning electrode group, and a contrast reduction adjustor (42) for simultaneously tracking a voltage on a low voltage side when a reference voltage is not inverted in the reference voltage selection D/A converter (27) and a power-supply voltage on a high-voltage side at the time of inversion, and adjusting the voltages so as to adjust reduction in contrast.

Abstract: A liquid crystal display apparatus having an amplitude detecting unit for detecting an amplitude of a supplied video signal; a liquid crystal display for displaying an image on a main surface based on the video signal; a backlight for giving off light with a luminance which can be freely set from the back surface of the liquid crystal display to the main surface; and a luminance setting unit for variably setting the luminance of the backlight based on the amplitude detected by the amplitude detecting unit.

Abstract: An image display apparatus, which requires individual transmission of signals to portions corresponding to a plurality of pixels or lines, such as a liquid crystal display, a plasma display and includes signal transmitting sections 4, 5 for transmitting signals to an image display section to which independent signals are applied for each pixel or line, a plurality of transmitting lines arranged parallel to each other at regular intervals are brought for each plurality of transmitting blocks. A transmitting line, serving as a dummy between transmitting lines which are located in different transmitting blocks and adjacent to each other, is disposed in any one of transmitting blocks including the adjacent transmitting lines. A transmitting line nearest to the dummy transmitting line in the other transmitting block of the transmitting blocks including the adjacent transmitting lines is electrically connected to the dummy transmitting line outside of the signal transmitting sections 4, 5.

Abstract: In a ramp signal producing apparatus, a ramp signal is produced under low clock signal frequency in a compact circuit arrangement. Luminance control and a white balance control are carried out by the ramp signal in a liquid crystal display. The ramp signal producing apparatus is comprised of: an up/down counter for either counting up, or counting down a clock signal supplied thereto; amplitude amount converting means for converting the amplitude of the supplied clock signal into such an amplitude value corresponding to the count value of the up/down counter and for converting the amplitude value in such a manner that a change amount per one count value is increased during the count down operation by the up/down counter; and ramp signal producing means for producing such a ramp signal with an amplitude corresponding to the converted amplitude value.

Abstract: In a ramp signal producing apparatus, a ramp signal is produced under low clock signal frequency in a compact circuit arrangement. Luminance control and a white balance control are carried out by the ramp signal in a liquid crystal display. The ramp signal producing apparatus is comprised of: an up/down counter for either counting up, or counting down a clock signal supplied thereto; amplitude amount converting means for converting the amplitude of the supplied clock signal into such an amplitude value corresponding to the count value of the up/down counter and for converting the amplitude value in such a manner that a change amount per one count value is increased during the count down operation by the up/down counter; and ramp signal producing means for producing such a ramp signal with an amplitude corresponding to the converted amplitude value.

Abstract: A display apparatus wherein a video signal of a child picture read out at a double speed is inserted accurately with a high resolution into a parent picture of another video signal having a double frequency. Control signals for designating a write area and a read-out area of a four field sequence memory provided for forming a double speed field frequency is formed in accordance with odd/even number field discrimination signals for write and read-out video signals, a vertical synchronizing signal prior to double speed conversion and a double speed synchronizing signal for a parent picture so that, even when the parent picture is scrolled, passing of the read-out side memory area does not take place. Where the parent picture is formed from a video signal of the interlace system by a line double speed, the double speed child picture video signal is delayed, upon reading out in an even-numbered field, by one horizontal scanning period so that lines may be overlapped between the parent and child pictures.

Abstract: A display apparatus comprising a field frequency converter for converting the field frequency of a parent-picture video signal; an aspect ratio converter for converting the aspect ratio of the video signal after the field frequency conversion; a child-picture processor for generating a child-picture video signal; and a switch for synthesizing the aspect-converted video signal with the video signal obtained from the child-picture processor. In one embodiment, the storage capacity of a memory required in the field frequency converter can be minimized. The apparatus further comprises a selector for selecting either the parent-picture video signal of the second aspect ratio or the parent-picture video signal of the first aspect ratio which has been converted to the second aspect ratio, wherein merely one switch is sufficient for synthesizing the video signal obtained from the child-picture processor with the selected parent-picture video signal of the second aspect ratio.

Abstract: An image display device including picture quality adjustment circuitry is adapted so that a selected one of an input video signal of a standard aspect ratio order an input video signal of a wide aspect ratio is input thereto, and a display having a wide aspect ratio screen for displaying an image of a video signal to which picture quality adjustment processing by the picture quality adjustment circuitry is implemented, wherein a scheme is employed to alter characteristics such as sharpness adjustment processing, etc. applied to the input video signal, thereby permitting picture qualities of display images of various aspect ratios to be optimized.

Abstract: A televison sound receiver includes an input terminal for receiving a television sound signal, a tuner connected to the input terminal, a channel selector connected to the tuner, an intercarrier sound demodulating circuit connected to the tuner, a split-carrier sound demodulating circuit connected to the tuner, a sound signal output terminal, and a switching device for selectively connecting one of the intercarrier and split-carrier sound demodulating circuits between the tuner and the sound signal output terminal and the switching device.