Patents by Inventor Susumu Ueda
Susumu Ueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240274176Abstract: A magnetic memory includes a plurality of cylindrical magnetic members each extending along a first direction and having a first end portion and a second end portion; and a magnetoresistive element that includes: a magnetization variable layer with a variable magnetization direction, a magnetization fixed layer with a fixed magnetization direction, and a non-magnetic layer between the magnetization variable layer and the magnetization fixed layer. When viewed in the first direction, the magnetoresistive element overlaps a part of the first end portion of one of the magnetic members. The magnetization direction of the magnetization variable layer intersects with the magnetization direction of the magnetization fixed layer at an angle larger than 0 degrees and smaller than 180 degrees.Type: ApplicationFiled: February 12, 2024Publication date: August 15, 2024Inventors: Naoharu SHIMOMURA, Tsuyoshi KONDO, Michael ARNAUD QUINSAT, Yasuaki OOTERA, Masaki KADO, Yoshihiro UEDA, Tsutomu NAKANISHI, Nobuyuki UMETSU, Susumu HASHIMOTO, Shiho NAKAMURA
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Publication number: 20130269913Abstract: A cooling unit main body having vapor diffusion flow paths which extend to the peripheral portion and capillary flow paths formed between the vapor diffusion flow paths and in a concave portion opposite region is provided with a thin concave portion in which an LED chip is mounted. Accordingly, heat from the LED chip can be easily transferred by what corresponds to the thinning of the concave portion, and successive circulating phenomenon caused by a refrigerant is repeated by the heat, and the heat is surely drawn from the LED chip by latent heat at a time when the refrigerant vaporizes, so that a heat pipe can maintain the light emitting state of the LED chip stably.Type: ApplicationFiled: February 5, 2007Publication date: October 17, 2013Applicant: MOLEX INCORPORATEDInventors: Susumu Ueda, Kenji Ohsawa, Katsuya Tsuruta, Toshiaki Kotani
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Patent number: 7821320Abstract: A temperature detection circuit includes a bandgap reference voltage generation circuit, a detection output circuit, and an output conversion circuit. The bandgap reference voltage generation circuit generates a first reference voltage and causes a bias current to flow through a current path to produce a thermal voltage. The current path has a first resistor. The detection output circuit has a second resistor and causes a mirror current of the bias current to flow through the second resistor. The output conversion circuit uses a second reference voltage to convert a voltage drop across the second resistor to a predetermined output form to detect a temperature. The first and second resistors are substantially identical in temperature dependence. The second reference voltage is generated from the first reference voltage.Type: GrantFiled: January 31, 2008Date of Patent: October 26, 2010Assignee: DENSO CORPORATIONInventor: Susumu Ueda
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Patent number: 7772501Abstract: A flexible printed circuit board (FPC) is disclosed which can eliminate the need for forming through holes and ensure the strength required for mounting components. The FPC has a metal foil layer formed only on one side of an insulating layer via an adhesive layer. The FPC is configured such that the insulating layer and the adhesive layer are partially removed, and the surface of the metal foil layer on the side from which the insulating layer and the adhesive layer have been removed is flattened. In a region from which the insulating layer and the adhesive layer have been removed, an overcoat layer for reinforcing the metal foil layer is provided along the metal foil layer on a surface opposite to the flattened surface. A drive IC is mounted on a first metal foil face of the metal foil layer and on a second metal foil face which is the flattened surface of the metal foil layer, and is provided with electrical conduction by the metal foil layer.Type: GrantFiled: June 8, 2006Date of Patent: August 10, 2010Assignees: Molex Incorporated, Innovation TS Flex-TechnologyInventors: Susumu Ueda, Shuichi Arimura
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Patent number: 7616694Abstract: A noise free transceiver circuit includes a communication line, a power source line, a ground line, an output transistor having output terminals connected between the communication line and the ground line for outputting a communication signal to the communication line, a first circuit for applying a trapezoidal signal to the input terminal of the output transistor to turn on in synchronism with a transmission signal and a second circuit for turning off the output transistor when the level of the transmission signal is high. The output transistor is turned off when the communication signal is outputted. Therefore, noises of the power line are shut out of the output transistor.Type: GrantFiled: January 16, 2007Date of Patent: November 10, 2009Assignee: DENSO CORPORATIONInventors: Masaki Mori, Tadatoshi Asada, Susumu Ueda, Hirokazu Toyoda
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Patent number: 7505240Abstract: An overcurrent protecting device for protecting a semiconductor element from an overcurrent includes: the semiconductor element; a shunt resistor for detecting the overcurrent when the electric current in the semiconductor element exceeds a threshold value; a reference resistor for setting the threshold value; a constant electric current circuit for supplying a constant electric current to the reference resistor; and a comparator for comparing a terminal voltage of the shunt resistor and a terminal voltage of the reference resistor. The shunt resistor is made of a same kind of resistor as the reference resistor.Type: GrantFiled: November 21, 2006Date of Patent: March 17, 2009Assignee: DENSO CORPORATIONInventors: Tadatoshi Asada, Hideto Okahara, Susumu Ueda
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Patent number: 7481359Abstract: An automatic transaction system has a cellular phone of a customer and an automatic teller machine (ATM) which can directly communicate with the cellular phone by infrared communication. When the customer performs a transaction by the ATM, transaction information such as transfer information registered in the cellular phone is directly inputted to the ATM and the ATM executes a transaction process by the transaction information which was directly received. When transaction data which is used in the transaction by the ATM is inputted once, transaction time in the ATM can be shortened by the simple operation.Type: GrantFiled: May 11, 2005Date of Patent: January 27, 2009Assignee: Oki Electric Industry Co., Ltd.Inventors: Hiroyuki Kawase, Susumu Ueda
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Patent number: 7466169Abstract: A signal detecting device detects, as analog voltage signals, a current flowing through an exciting coil of an electric power generator, a source voltage and a temperature of a regulator that change as a current is fed to the exciting coil by an FET. These analog voltage signals are subjected to A/D conversion by a single A/D converter circuit. The detected current is subjected to A/D conversion in a period during which the FET is ON, while the detected source voltage and the detected temperature are subjected to A/D conversion in a period during which the FET is OFF.Type: GrantFiled: August 31, 2006Date of Patent: December 16, 2008Assignee: DENSO CORPORATIONInventors: Tadatoshi Asada, Susumu Ueda
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Publication number: 20080187026Abstract: A temperature detection circuit includes a bandgap reference voltage generation circuit, a detection output circuit, and an output conversion circuit. The bandgap reference voltage generation circuit generates a first reference voltage and causes a bias current to flow through a current path to produce a thermal voltage. The current path has a first resistor. The detection output circuit has a second resistor and causes a mirror current of the bias current to flow through the second resistor. The output conversion circuit uses a second reference voltage to convert a voltage drop across the second resistor to a predetermined output form to detect a temperature. The first and second resistors are substantially identical in temperature dependence. The second reference voltage is generated from the first reference voltage.Type: ApplicationFiled: January 31, 2008Publication date: August 7, 2008Applicant: DENSO CORPORATIONInventor: Susumu Ueda
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Publication number: 20070246248Abstract: A flexible printed circuit board (FPC) is disclosed which can eliminate the need for forming through holes and ensure the strength required for mounting components. The FPC has a metal foil layer formed only on one side of an insulating layer via an adhesive layer. The FPC is configured such that the insulating layer and the adhesive layer are partially removed, and the surface of the metal foil layer on the side from which the insulating layer and the adhesive layer have been removed is flattened. In a region from which the insulating layer and the adhesive layer have been removed, an overcoat layer for reinforcing the metal foil layer is provided along the metal foil layer on a surface opposite to the flattened surface. A drive IC is mounted on a first metal foil face of the metal foil layer and on a second metal foil face which is the flattened surface of the metal foil layer, and is provided with electrical conduction by the metal foil layer.Type: ApplicationFiled: June 8, 2006Publication date: October 25, 2007Inventors: Susumu Ueda, Shuichi Arimura
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Publication number: 20070206685Abstract: A noise free transceiver circuit includes a communication line, a power source line, a ground line, an output transistor having output terminals connected between the communication line and the ground line for outputting a communication signal to the communication line, a first circuit for applying a trapezoidal signal to the input terminal of the output transistor to turn on in synchronism with a transmission signal and a second circuit for turning off the output transistor when the level of the transmission signal is high. The output transistor is turned off when the communication signal is outputted. Therefore, noises of the power line are shut out of the output transistor.Type: ApplicationFiled: January 16, 2007Publication date: September 6, 2007Applicant: DENSO CORPORATIONInventors: Masaki Mori, Tadatoshi Asada, Susumu Ueda, Hirokazu Toyoda
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Publication number: 20070146952Abstract: An overcurrent protecting device for protecting a semiconductor element from an overcurrent includes: the semiconductor element; a shunt resistor for detecting the overcurrent when the electric current in the semiconductor element exceeds a threshold value; a reference resistor for setting the threshold value; a constant electric current circuit for supplying a constant electric current to the reference resistor; and a comparator for comparing a terminal voltage of the shunt resistor and a terminal voltage of the reference resistor. The shunt resistor is made of a same kind of resistor as the reference resistor.Type: ApplicationFiled: November 21, 2006Publication date: June 28, 2007Applicant: DENSO CORPORATIONInventors: Tadatoshi Asada, Hideto Okahara, Susumu Ueda
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Publication number: 20070103840Abstract: A signal detecting device detects, as analog voltage signals, a current flowing through an exciting coil of an electric power generator, a source voltage and a temperature of a regulator that change as a current is fed to the exciting coil by an FET. These analog voltage signals are subjected to A/D conversion by a single A/D converter circuit. The detected current is subjected to A/D conversion in a period during which the FET is ON, while the detected source voltage and the detected temperature are subjected to A/D conversion in a period during which the FET is OFF.Type: ApplicationFiled: August 31, 2006Publication date: May 10, 2007Applicant: DENSO CORPORATIONInventors: Tadatoshi Asada, Susumu Ueda
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Publication number: 20050262017Abstract: An automatic transaction system has a cellular phone of a customer and an automatic teller machine (ATM) which can directly communicate with the cellular phone by infrared communication. When the customer performs a transaction by the ATM, transaction information such as transfer information registered in the cellular phone is directly inputted to the ATM and the ATM executes a transaction process by the transaction information which was directly received. When transaction data which is used in the transaction by the ATM is inputted once, transaction time in the ATM can be shortened by the simple operation.Type: ApplicationFiled: May 11, 2005Publication date: November 24, 2005Applicant: Oki Electric Industry Co., Ltd.Inventors: Hiroyuki Kawase, Susumu Ueda
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Patent number: 6936465Abstract: A plasmid vector having components (D1), (D2), and (D3) enables the efficient integration of foreign DNA into host cells. The components are (D1) an integrase gene, (D2) a segment of DNA forming a region for controlling the expression of the integrase gene, and (D3) a segment of DNA serving as an integrase recognition region when integrase catalyzes the integration reaction.Type: GrantFiled: April 27, 2000Date of Patent: August 30, 2005Assignee: Nippon Institute for Biological ScienceInventors: Atsushi Katsumata, Sumio Hoshi, Takeshi Ihara, Susumu Ueda
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Patent number: 6610515Abstract: The present invention provides a medicine which promotes the production of neutrophiles in case the number of the neutrophiles decreases upon treating the tumor of a cat, and does not have side-effects, wherein said medicine is prepared by incorporating, as an active ingredient, a protein which consists of 174 amino acids, and has an activity as a feline granulocyte colony stimulating factor.Type: GrantFiled: April 24, 2000Date of Patent: August 26, 2003Assignee: Nippon Institute for Biological ScienceInventors: Akira Yamamoto, Kotaro Tuchiya, Akira Iwata, Susumu Ueda
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Patent number: 6469461Abstract: A motor control system designed to monitor a failure in a multi-phase dc motor is provided. The motor control system includes an inverter which controls an operation of the motor, a failure detecting circuit which monitors the voltage appearing at one of terminals of armature windings of the motor every active time when a PWM signal is at an active level to turn on switching elements of the inverter and determines occurrence of the failure based on the monitored voltage, and a switching operation prohibiting circuit which prohibits one of the switching elements connected to the one of the terminals of the windings of the motor from being turned on, thereby avoiding additional damages of the motor control system.Type: GrantFiled: October 4, 2000Date of Patent: October 22, 2002Assignee: Denso CorporationInventors: Shinichi Konda, Susumu Ueda
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Patent number: 5727879Abstract: An organic waste decomposition treatment apparatus, wherein agitation vanes of flight members are rotatably attached to looped chains, so as to churn and ferment organic waste accumulated within a reservoir vat when the chain is rotationally driven, then be pushed towards an interior of the agitator by a push-down scraper which is positioned outside of the agitator at a back side of the agitator with respect to the direction of advancement, so as to eliminate contact resistance between the agitator and the organic waste at the back side of the agitator. It is thereby possible to make the agitator smaller and less expensive, and the decomposition treatment efficiency of organic waste is able to be increased.Type: GrantFiled: September 20, 1996Date of Patent: March 17, 1998Assignee: Daiwa Co., Ltd.Inventor: Susumu Ueda
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Patent number: 5672894Abstract: The resistance to electromigration in a double-layer Al wiring structure of lateral DMOS or the like is improved by further reducing ON resistance and mitigating current concentration. The first-layer source wiring and the first-layer drain wiring which are electrically connected to a plurality of source cells and drain cells respectively are formed into a pectinate pattern respectively. The second-layer source wiring and the second-layer drain wiring are also formed into a pectinate pattern respectively and disposed in inclination at 45 degrees to the patterns of the first-layer source wiring and first-layer drain wiring.Type: GrantFiled: October 19, 1995Date of Patent: September 30, 1997Assignee: Nippondenso Co., Ltd.Inventors: Hiroshi Maeda, Susumu Ueda, Hiroshi Fujimoto, Yoshiaki Nakayama
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Patent number: 5630948Abstract: Integrated conductor suspensions are fabricated by progressively etching a suspension shape in a preformed laminate of copper, and stainless steel adhering to an intermediate resin layer, including defining pairs of signal lines in the copper layer having exposed sides and top, and coating these exposed sides and top with an adherent layer of gold down to the resin layer against corrosion in ambient corrosive environments.Type: GrantFiled: November 21, 1995Date of Patent: May 20, 1997Assignee: Magnecomp Corp.Inventors: Susumu Ueda, Daniel Vera