Abstract: An air conditioning device for a vehicle includes: a housing having an inside divided into an inflow space, a heat exchange space, and an outflow space, which are straightly arranged, and having a plurality of discharge ports, which communicates with an interior, at the inflow space; a blowing unit disposed at the inflow space of the housing and configured to blow air; a heat exchange unit disposed at the heat exchange space of the housing and configured to adjust a temperature of conditioned air by exchanging heat with air; and an opening-closing door disposed at the outflow space of the housing and configured to open and close the plurality of discharge ports such that conditioned air at an adjusted temperature selectively flows to the plurality of discharge ports. The air conditioning device adjusts the temperature of conditioned air for respective modes and reduces a flow resistance of air.

Abstract: Semiconductor devices include a channel layer on a substrate, the channel layer including a material having a lattice constant different from a lattice constant of the substrate, a first gate electrode on the channel layer, a first source region of a first conductivity type at a first side of the first gate electrode, a first body region of a second conductivity type under the first source region and contacting the first source region, a first drain region of the first conductivity type disposed at a second side of the first gate electrode, a first drift region of the first conductivity type under the first drain region and contacting the first drain region, and a first stud region in the channel layer and the first drift region. The first stud region has an impurity concentration higher than an impurity concentration of the first drift region.

Abstract: A semiconductor device includes a substrate including a first impurity diffusion region having a first doping concentration and at least one second impurity diffusion region having a second doping concentration different from the first doping concentration, the at least one second impurity region being surrounded by the first impurity diffusion region; at least one electrode facing the first impurity diffusion region and the at least one second impurity diffusion region; and at least one insulating layer between the first impurity diffusion region and the at least one electrode, and between the at least one second impurity diffusion region and the at least one electrode.

Abstract: Semiconductor devices include a channel layer on a substrate, the channel layer including a material having a lattice constant different from a lattice constant of the substrate, a first gate electrode on the channel layer, a first source region of a first conductivity type at a first side of the first gate electrode, a first body region of a second conductivity type under the first source region and contacting the first source region, a first drain region of the first conductivity type disposed at a second side of the first gate electrode, a first drift region of the first conductivity type under the first drain region and contacting the first drain region, and a first stud region in the channel layer and the first drift region. The first stud region has an impurity concentration higher than an impurity concentration of the first drift region.

Abstract: Semiconductor devices include a channel layer on a substrate, the channel layer including a material having a lattice constant different from a lattice constant of the substrate, a first gate electrode on the channel layer, a first source region of a first conductivity type at a first side of the first gate electrode, a first body region of a second conductivity type under the first source region and contacting the first source region, a first drain region of the first conductivity type disposed at a second side of the first gate electrode, a first drift region of the first conductivity type under the first drain region and contacting the first drain region, and a first stud region in the channel layer and the first drift region. The first stud region has an impurity concentration higher than an impurity concentration of the first drift region.

Abstract: A semiconductor device includes a substrate including a first impurity diffusion region having a first doping concentration and at least one second impurity diffusion region having a second doping concentration different from the first doping concentration, the at least one second impurity region being surrounded by the first impurity diffusion region; at least one electrode facing the first impurity diffusion region and the at least one second impurity diffusion region; and at least one insulating layer between the first impurity diffusion region and the at least one electrode, and between the at least one second impurity diffusion region and the at least one electrode.

Abstract: Semiconductor devices include a channel layer on a substrate, the channel layer including a material having a lattice constant different from a lattice constant of the substrate, a first gate electrode on the channel layer, a first source region of a first conductivity type at a first side of the first gate electrode, a first body region of a second conductivity type under the first source region and contacting the first source region, a first drain region of the first conductivity type disposed at a second side of the first gate electrode, a first drift region of the first conductivity type under the first drain region and contacting the first drain region, and a first stud region in the channel layer and the first drift region. The first stud region has an impurity concentration higher than an impurity concentration of the first drift region.

Abstract: Provided is a capacitor of a semiconductor device. The capacitor can includes a plurality of parallel lower conductive lines in parallel and a plurality of upper conductive lines on the lower conductive lines. Each lower conductive line can have a line width that is different than that of the upper conductive line adjacent to it.

Abstract: An inductor for semiconductor devices and a method of fabricating the same are disclosed. Through an improved electrical connection between a metal wiring and an inductor line, an improved Q-index and minimized energy loss in a substrate can be accomplished, and a parasitic capacitance can be minimized. For this, the inductor which may include a substrate and an insulating layer formed over the substrate and containing a metal wiring therein. A metal pad may be formed over the insulating layer. An inductor line may be formed over the insulating layer and connected to the metal pad. A pad contact, a metal layer and a via contact may be sequentially stacked within the insulating layer between the metal wiring and the metal pad.

Abstract: Provided is a semiconductor device of a multi-finger type. The semiconductor device comprises an active region, a guard ring, a source electrode, at least one gate electrode, and at least one drain electrode. The active region includes a source region, a drain region, and a channel region. The guard ring surrounds the active region. The source electrode is connected to the guard ring and a bulk region. The source electrode includes electrode bodies disposed on a first side of the active region and a second side of the active region opposite the first side, and fingers connecting the two electrode bodies to branch through the source region. The gate electrode can be provided in plurality as fingers on the channel region. One or more gate electrode fingers can be connected to each other through a set of vias. The drain electrode can be provided in plurality as fingers branching on the drain region.

Abstract: In a semiconductor device having a first region formed with the inductor and a second region formed with transistors, the inductor includes a deep well region formed in the silicon substrate beneath the first and second regions, a well region formed on the deep well region in the second region, N type shield regions formed to have the same depth as the well region, and P type shield regions arranged to alternate with the N type shield regions, the transistors formed on the silicon substrate in the second region, an insulating film formed over an entire surface of the silicon substrate such that the insulating film covers the transistors, and a metal line formed on the insulating film in the first region such that the metal line corresponds to the N and P type shield regions.

Abstract: A tunable active inductor and a voltage controlled oscillator (VCO) are provided. The tunable active inductor includes a first current source coupled to a power source, a first metal-oxide semiconductor (MOS) transistor including a drain coupled to the first current source and a gate coupled to a first bias voltage, a second MOS transistor including a drain coupled to the power source and a gate coupled to the drain of the first MOS transistor, the gate of the second MOS and the drain of the first MOS being coupled to a second bias voltage, a resonator coupled to a source of the second MOS transistor, and a second current source coupled to the resonator. The VCO employs the tunable active inductor to freely vary the oscillation range of the VCO in a high frequency band.