Patents by Inventor Suvi Haukka

Suvi Haukka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6887795
    Abstract: This invention relates to manufacturing of integrated circuits (ICs) and especially conductive layers suitable for use in an IC. According to the preferred method a metal oxide thin film is deposited on a substrate surface and reduced thereafter essentially into a metallic form with an organic reducing agent. The metal oxide is preferably deposited according to the principles of atomic layer deposition (ALD) using a metal source chemical and an oxygen source chemical. The reduction step is preferably carried out in an ALD reactor using one or more vaporized organic compounds that contain at least one functional group selected from the group consisting of —OH, —CHO and —COOH.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: May 3, 2005
    Assignee: ASM International N.V.
    Inventors: Pekka J. Soininen, Kai-Erik Elers, Suvi Haukka
  • Patent number: 6858524
    Abstract: A method of manufacturing a high performance MOS device and transistor gate stacks comprises forming a gate dielectric layer over a semiconductor substrate; forming a barrier layer over the gate dielectric layer by an ALD type process; and forming a gate electrode layer over the barrier layer. The method enables the use of hydrogen plasma, high energy hydrogen radicals and ions, other reactive radicals, reactive oxygen and oxygen containing precursors in the processing steps subsequent to the deposition of the gate dielectric layer of the device. The ALD process for forming the barrier layer is performed essentially in the absence of plasma and reactive hydrogen radials and ions. This invention makes it possible to use oxygen as a precursor in the deposition of the metal gates. The barrier film also allows the use of hydrogen plasma in the form of either direct or remote plasma in the deposition of the gate electrode.
    Type: Grant
    Filed: May 5, 2003
    Date of Patent: February 22, 2005
    Assignee: ASM International, NV
    Inventors: Suvi Haukka, Hannu Huotari
  • Patent number: 6806145
    Abstract: The present invention relates to methods for forming dielectric layers on a substrate, such as in an integrated circuit. In one aspect of the invention, a thin interfacial layer is formed. The interfacial layer is preferably an oxide layer and a high-k material is preferably deposited on the interfacial layer by a process that does not cause substantial further growth of the interfacial layer. For example, water vapor may be used as an oxidant source during high-k deposition at less than or equal to about 300° C.
    Type: Grant
    Filed: August 22, 2002
    Date of Patent: October 19, 2004
    Assignee: ASM International, N.V.
    Inventors: Suvi Haukka, Eric Shero, Christophe Pomarede, Jan Willem Hub Maes, Marko Tuominen
  • Patent number: 6759325
    Abstract: Method and structures are provided for conformal lining of dual damascene structures in integrated circuits, and particularly of openings formed in porous materials. Trenches and contact vias are formed in insulating layers. The pores on the sidewalls of the trenches and vias are blocked, and then the structure is exposed to alternating chemistries to form monolayers of a desired lining material. In exemplary process flows chemical or physical vapor deposition (CVD or PVD) of a sealing layer blocks the pores due to imperfect conformality. An alternating process can also be arranged by selection of pulse separation and/or pulse duration to achieve reduced conformality relative to a self-saturating, self-limiting atomic layer deposition (ALD) process. In still another arrangement, layers with anisotropic pore structures can be sealed by selectively melting upper surfaces. Blocking is followed by a self-limiting, self-saturating atomic layer deposition (ALD) reactions without significantly filling the pores.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: July 6, 2004
    Assignee: ASM Microchemistry Oy
    Inventors: Ivo Raaijmakers, Pekka T. Soininen, Ernst Granneman, Suvi Haukka, Kai-Erik Elers, Marko Tuominen, Hessel Sprey, Herbert Terhorst, Menso Hendriks
  • Publication number: 20040106261
    Abstract: A method forms a gate stack for a semiconductor device with a desired work function of the gate electrode. The work function is adjusted by changing the overall electronegativity of the gate electrode material in the region that determines the work function of the gate electrode during the gate electrode deposition. The gate stack is deposited by an atomic layer deposition type process and the overall electronegativity of the gate electrode is tuned by introducing at least one pulse of an additional precursor to selected deposition cycles of the gate electrode. The tuning of the work function of the gate electrode can be done not only by introducing additional material into the gate electrode, but also by utilizing the effects of a graded mode deposition and thickness variations of the lower gate part of the gate electrode in combination with the effects that the incorporation of the additional material pulses offers.
    Type: Application
    Filed: May 5, 2003
    Publication date: June 3, 2004
    Applicant: ASM International N.V.
    Inventors: Hannu Huotari, Suvi Haukka, Marko Tuominen
  • Publication number: 20040104439
    Abstract: A method of manufacturing a high performance MOS device and transistor gate stacks comprises forming a gate dielectric layer over a semiconductor substrate; forming a barrier layer over the gate dielectric layer by an ALD type process; and forming a gate electrode layer over the barrier layer. The method enables the use of hydrogen plasma, high energy hydrogen radicals and ions, other reactive radicals, reactive oxygen and oxygen containing precursors in the processing steps subsequent to the deposition of the gate dielectric layer of the device. The ALD process for forming the barrier layer is performed essentially in the absence of plasma and reactive hydrogen radials and ions. This invention makes it possible to use oxygen as a precursor in the deposition of the metal gates. The barrier film also allows the use of hydrogen plasma in the form of either direct or remote plasma in the deposition of the gate electrode.
    Type: Application
    Filed: May 5, 2003
    Publication date: June 3, 2004
    Applicant: ASM International N.V.
    Inventors: Suvi Haukka, Hannu Huotari
  • Publication number: 20040065253
    Abstract: Process for producing silicon oxide containing thin films on a growth substrate by the ALCVD method. In the process, a vaporisable silicon compound is bonded to the growth substrate, and the bonded silicon compound is converted to silicon dioxide. The invention comprises using a silicon compound which contains at least one organic ligand and the bonded silicon compound is converted to silicon dioxide by contacting it with a vaporised, reactive oxygen source, in particular with ozone. The present invention provides a controlled process for growing controlling thin films containing SiO2, with sufficiently short reaction times.
    Type: Application
    Filed: October 3, 2003
    Publication date: April 8, 2004
    Inventors: Eva Tois, Suvi Haukka, Marko Tuominen
  • Publication number: 20040005753
    Abstract: A method for forming a conductive thin film includes depositing a metal oxide thin film on a substrate by an atomic layer deposition (ALD) process. The method further includes at least partially reducing the metal oxide thin film by exposing the metal oxide thin film to a reducing agent, thereby forming a seed layer. In one arrangement, the reducing agent comprises one or more organic compounds that contain at least one functional group selected from the group consisting of —OH, —CHO, and —COOH. In another arrangement, the reducing agent comprises an electric current.
    Type: Application
    Filed: March 20, 2003
    Publication date: January 8, 2004
    Inventors: Juhana Kostamo, Pekka J. Soininen, Kai-Erik Elers, Suvi Haukka
  • Publication number: 20030188682
    Abstract: Process for producing silicon oxide containing thin films on a growth substrate by the ALCVD method. In the process, a vaporisable silicon compound is bonded to the growth substrate, and the bonded silicon compound is converted to silicon dioxide. The invention comprises using a silicon compound which contains at least one organic ligand and the bonded silicon compound is converted to silicon dioxide by contacting it with a vaporised, reactive oxygen source, in particular with ozone. The present invention provides a controlled process for growing controlling thin films containing SiO2, with sufficiently short reaction times.
    Type: Application
    Filed: August 27, 2002
    Publication date: October 9, 2003
    Applicant: ASM Microchemistry OY
    Inventors: Eva Tois , Suvi Haukka , Marko Tuominen
  • Publication number: 20030143839
    Abstract: Method and structures are provided for conformal lining of dual damascene structures in integrated circuits, and particularly of openings formed in porous materials. Trenches and contact vias are formed in insulating layers. The pores on the sidewalls of the trenches and vias are blocked, and then the structure is exposed to alternating chemistries to form monolayers of a desired lining material. In exemplary process flows chemical or physical vapor deposition (CVD or PVD) of a sealing layer blocks the pores due to imperfect conformality. An alternating process can also be arranged by selection of pulse separation and/or pulse duration to achieve reduced conformality relative to a self-saturating, self-limiting atomic layer deposition (ALD) process. In still another arrangement, layers with anisotropic pore structures can be sealed by selectively melting upper surfaces. Blocking is followed by a self-limiting, self-saturating atomic layer deposition (ALD) reactions without significantly filling the pores.
    Type: Application
    Filed: November 22, 2002
    Publication date: July 31, 2003
    Inventors: Ivo Raaijmakers, Pekka T. Soininen, Ernst Granneman, Suvi Haukka, Kai-Erik Elers, Marko Tuominen, Hessel Sprey, Herbert Terhorst, Menso Hendriks
  • Publication number: 20030096468
    Abstract: This invention relates to manufacturing of integrated circuits (ICs) and especially conductive layers suitable for use in an IC. According to the preferred method a metal oxide thin film is deposited on a substrate surface and reduced thereafter essentially into a metallic form with an organic reducing agent. The metal oxide is preferably deposited according to the principles of atomic layer deposition (ALD) using a metal source chemical and an oxygen source chemical. The reduction step is preferably carried out in an ALD reactor using one or more vaporized organic compounds that contain at least one functional group selected from the group consisting of —OH, —CHO and —COOH.
    Type: Application
    Filed: November 19, 2002
    Publication date: May 22, 2003
    Inventors: Pekka J. Soininen, Kai-Erik Elers, Suvi Haukka
  • Publication number: 20030049942
    Abstract: The present invention relates to methods for forming dielectric layers on a substrate, such as in an integrated circuit. In one aspect of the invention, a thin interfacial layer is formed. The interfacial layer is preferably an oxide layer and a high-k material is preferably deposited on the interfacial layer by a process that does not cause substantial further growth of the interfacial layer. For example, water vapor may be used as an oxidant source during high-k deposition at less than or equal to about 300° C.
    Type: Application
    Filed: August 22, 2002
    Publication date: March 13, 2003
    Inventors: Suvi Haukka, Eric Shero, Christophe Pomarede, Jan Willem Hub Maes, Marko Tuominen
  • Patent number: 6500780
    Abstract: The present invention concerns a method for preparing heterogeneous catalysts. According to the method, preparation is carried out under such process conditions in which the bonding of compounds from the gas phase onto the surface of a support material is primarily determined by the properties of the support surface. The constituents contained in the reagent are then selectively bonded to the bonding sites of the support material surface, thus forming stable surface bonds. According to the invention, the number of surface-bond sites available for preparing a stable product with surface bonds is controlled by varying the reaction temperature and/or selecting a suitable reagent. The invention makes it possible to control the metal content of the end product at a predetermined level.
    Type: Grant
    Filed: April 14, 1997
    Date of Patent: December 31, 2002
    Assignee: Neste Oy
    Inventors: Tuomo Suntola, Suvi Haukka, Arla Kytökivi, Eeva-Liisa Lakomaa, Marina Lindblad, Jukka Hietala, Harri Hokkanen, Hilkka Knuuttila, Pekka Knuuttila, Outi Krause, Lars Peter Lindfors
  • Patent number: 6482740
    Abstract: This invention relates to manufacturing of integrated circuits (ICs) and especially conductive layers suitable for use in an IC. According to the preferred method a metal oxide thin film is deposited on a substrate surface and reduced thereafter essentially into a metallic form with an organic reducing agent. The metal oxide is preferably deposited according to the principles of atomic layer deposition (ALD) using a metal source chemical and an oxygen source chemical. The reduction step is preferably carried out in an ALD reactor using one or more vaporized organic compounds that contain at least one functional group selected from the group consisting of —OH, —CHO and —COOH.
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: November 19, 2002
    Assignee: ASM Microchemistry Oy
    Inventors: Pekka J. Soininen, Kai-Erik Elers, Suvi Haukka
  • Publication number: 20020004293
    Abstract: This invention relates to manufacturing of integrated circuits (ICs) and especially conductive layers suitable for use in an IC. According to the preferred method a metal oxide thin film is deposited on a substrate surface and reduced thereafter essentially into a metallic form with an organic reducing agent. The metal oxide is preferably deposited according to the principles of atomic layer deposition (ALD) using a metal source chemical and an oxygen source chemical. The reduction step is preferably carried out in an ALD reactor using one or more vaporized organic compounds that contain at least one functional group selected from the group consisting of —OH, —CHO and —COOH.
    Type: Application
    Filed: May 15, 2001
    Publication date: January 10, 2002
    Inventors: Pekka J. Soininen, Kai-Erik Elers, Suvi Haukka