Patents by Inventor Suyash Ranjan

Suyash Ranjan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220147133
    Abstract: Methods, systems, and devices for wireless communications are described. A device may identify modes from a set of modes in which at least one modem functional block of a set of modem functional blocks of a chipset operates during a portion of a time interval. Each modem functional block may include a set of units classified to have a power response that satisfies a power trend metric for at least one mode. The device may select power calculation equations from a set of power calculation equations based on the set of multiple modes, calculate an power consumption level for the chipset for the time interval based on the selected power calculation equations and a proportion of the time interval a respective multiple modem functional block of the set of modem functional blocks operates in a respective mode of the set of multiple modes.
    Type: Application
    Filed: November 5, 2021
    Publication date: May 12, 2022
    Inventors: Suyash Ranjan, Jittra Jootar, Shriram Gurumoorthy, Saikat Das
  • Publication number: 20200008144
    Abstract: Link speed control systems for power optimization are disclosed. In one aspect, a communication link adjusts a data transfer speed based on link utilization levels. In a second exemplary aspect, one or more conditions affecting a link speed are weighted and collectively evaluated to determine an efficient or optimal link speed. By adjusting the link speed in this fashion, lower link speeds may be used, and net power savings may be effectuated.
    Type: Application
    Filed: September 9, 2019
    Publication date: January 2, 2020
    Inventors: Neven Klacar, Murali Krishna, Shailesh Maheshwari, Suyash Ranjan, Ofer Rosenberg
  • Patent number: 10390305
    Abstract: Methods, systems, and devices for wireless communication in a user equipment (UE) are described in which a cycle duration of an extended discontinuous reception (eDRX) cycle is determined. The UE enters a sleep state of the eDRX cycle and, based on the determination of the cycle duration, uses a first clock as a timer during the sleep state and uses a second clock as a timing calibrator during the sleep state. The first clock may have a lower power consumption and a higher frequency error, and the second clock may have a higher power consumption and a lower frequency error.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: August 20, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: James Francis Geekie, Suyash Ranjan, Xu Chi
  • Publication number: 20170280385
    Abstract: Link speed control systems for power optimization are disclosed. In one aspect, a communication link adjusts a data transfer speed based on link utilization levels. In a second exemplary aspect, one or more conditions affecting a link speed are weighted and collectively evaluated to determine an efficient or optimal link speed. By adjusting the link speed in this fashion, lower link speeds may be used, and net power savings may be effectuated.
    Type: Application
    Filed: March 22, 2017
    Publication date: September 28, 2017
    Inventors: Neven Klacar, Murali Krishna, Shailesh Maheshwari, Suyash Ranjan, Ofer Rosenberg
  • Patent number: 7969445
    Abstract: A system, method, and computer program product are provided for broadcasting write operations in a multiple-target system. In use, a write operation is received at one of a plurality of apertures of an address space. Such write operation is then replicated to produce a plurality of write operations. To this end, the write operations may be broadcasted to a plurality of targets. At least one of the targets includes another one of the apertures that produces at least one additional write operation.
    Type: Grant
    Filed: June 20, 2007
    Date of Patent: June 28, 2011
    Assignee: NVIDIA Corporation
    Inventors: Brian Keith Langendorf, James P. Reilley, Suyash Ranjan
  • Patent number: 7917671
    Abstract: A scalable port controller architecture supporting data streams of different speeds. In an embodiment, a port controller contains high speed receptor units and low speed receptor units, and a port routing logic connecting each external device (on corresponding port) to one of the receptors according to various registers. The port routing logic may connect an external device to one of the receptors, which determines the data rate at which data on a corresponding virtual connection from the external device is being received/sent. If the receptor does not have sufficient capacity (based on the data rate) to communicate with the external device, the connection is moved to other receptors, potentially in another control unit.
    Type: Grant
    Filed: December 18, 2007
    Date of Patent: March 29, 2011
    Assignee: NVIDIA Corporation
    Inventors: Muralidharan Soundararajan Chilukoor, Robert Chapman, Mark Alan Overby, Suyash Ranjan
  • Publication number: 20090157916
    Abstract: A scalable port controller architecture supporting data streams of different speeds. In an embodiment, a port controller contains high speed receptor units and low speed receptor units, and a port routing logic connecting each external device (on corresponding port) to one of the receptors according to various registers. The port routing logic may connect an external device to one of the receptors, which determines the data rate at which data on a corresponding virtual connection from the external device is being received/sent. If the receptor does not have sufficient capacity (based on the data rate) to communicate with the external device, the connection is moved to other receptors, potentially in another control unit.
    Type: Application
    Filed: December 18, 2007
    Publication date: June 18, 2009
    Applicant: NVIDIA Corporation
    Inventors: Muralidharan Soundararajan Chilukoor, Robert Chapman, Mark Alan Overby, Suyash Ranjan
  • Publication number: 20080316842
    Abstract: A system, method, and computer program product are provided for broadcasting write operations in a multiple-target system. In use, a write operation is received at one of a plurality of apertures of an address space. Such write operation is then replicated to produce a plurality of write operations. To this end, the write operations may be broadcasted to a plurality of targets. At least one of the targets includes another one of the apertures that produces at least one additional write operation.
    Type: Application
    Filed: June 20, 2007
    Publication date: December 25, 2008
    Inventors: Brian Keith Langendorf, James P. Reilley, Suyash Ranjan