Patents by Inventor Suzette Keefe Pangrle

Suzette Keefe Pangrle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7378310
    Abstract: A method for manufacturing a memory device having a metal nanocrystal charge storage structure. A substrate is provided and a first layer of dielectric material is grown on the substrate. A layer of metal oxide having a first heat of formation is formed on the first layer of dielectric material. A metal layer having a second heat of formation is formed on the metal oxide layer. The second heat of formation is greater than the first heat of formation. The metal oxide layer and the metal layer are annealed which causes the metal layer to reduce the metal oxide layer to metallic form, which then agglomerates to form metal islands. The metal layer becomes oxidized thereby embedding the metal islands within an oxide layer to form a nanocrystal layer. A control oxide is formed over the nanocrystal layer and a gate electrode is formed on the control oxide.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: May 27, 2008
    Assignees: Spansion LLC, Advanced Micro Devices, Inc.
    Inventors: Connie Pin-Chin Wang, Zoran Krivokapic, Suzette Keefe Pangrle, Robert Chiu, Lu You
  • Patent number: 7335594
    Abstract: A method for manufacturing a memory device having a metal nanocrystal charge storage structure. A substrate is provided and a first layer of dielectric material is grown on the substrate. An absorption layer is formed on the first layer of dielectric material. The absorption layer includes a plurality of titanium atoms bonded to the first layer of dielectric material, a nitrogen atom bonded to each titanium atom, and at least one ligand bonded to the nitrogen atom. The at least one ligand is removed from the nitrogen atoms to form nucleation centers. A metal such as tungsten is bonded to the nucleation centers to form metallic islands. A dielectric material is formed on the nucleation centers and annealed to form a nanocrystal layer. A control oxide is formed over the nanocrystal layer and a gate electrode is formed on the control oxide.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: February 26, 2008
    Assignees: Spansion LLC, Advanced Micro Devices, Inc.
    Inventors: Connie Pin-Chin Wang, Zoran Krivokapic, Suzette Keefe Pangrle, Jinsong Yin
  • Patent number: 7309650
    Abstract: A memory device having a metal nanocrystal charge storage structure and a method for its manufacture. The memory device may be manufactured by forming a first oxide layer on the semiconductor substrate, then disposing a porous dielectric layer on the oxide layer and disposing a second oxide layer on the porous dielectric layer. A layer of electrically conductive material is formed on the second layer of dielectric material. An etch mask is formed on the electrically conductive material. The electrically conductive material and the underlying dielectric layers are anisotropically etched to form a dielectric structure on which a gate electrode is disposed. A metal layer is formed on the dielectric structure and the gate electrode and treated so that portions of the metal layer diffuse into the porous dielectric layer. Then the metal layer is removed.
    Type: Grant
    Filed: February 24, 2005
    Date of Patent: December 18, 2007
    Assignees: Spansion LLC, Advanced Micro Devices, Inc.
    Inventors: Connie Pin-Chin Wang, Lu You, Zoran Krivokapic, Paul Raymond Besser, Suzette Keefe Pangrle