Patents by Inventor Suzuka Nishimura

Suzuka Nishimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9755111
    Abstract: A structure of a high luminance LED and a high luminance LD is provided. The present invention provides a light emitting device containing, on a zinc blend-type BP layer formed on an Si substrate, an AlyInxGazN (y?0, x>0) crystal as a mother crystal maintaining the zinc blend-type crystal structure and In dots having an In concentration higher than that of the AlyInxGazN (y?0, x>0) crystal as the mother crystal.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: September 5, 2017
    Assignees: NITTO OPTICAL CO., LTD., SOLARTES Lab, LTD.
    Inventors: Kazutaka Terashima, Suzuka Nishimura, Muneyuki Hirai
  • Patent number: 9595632
    Abstract: A method for producing a GaN-based crystal includes forming a Zinc-blend type BP crystal layer on a Si substrate; forming an In-containing layer, on the BP crystal layer, with such a thickness as to keep the Zinc-blend type structure; and forming a Zinc-blend type GaN-based crystal layer on the In-containing layer. The In-containing layer is a metallic In layer having a thickness of 4 atom layers or less, an InGaN layer having a thickness of 2 nm or less, an InAl mixture layer having a thickness of 4 atom layers or less and containing Al at 10% or less, or an AlInGaN layer having a thickness of 2 nm or less and containing Al at 10% or less.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: March 14, 2017
    Assignees: NITTO OPTICAL CO., LTD., SOLARTES Lab, Ltd.
    Inventors: Kazutaka Terashima, Suzuka Nishimura, Muneyuki Hirai
  • Publication number: 20160087153
    Abstract: A structure of a high luminance LED and a high luminance LD is provided. The present invention provides a light emitting device containing, on a zinc blende-type BP layer formed on an Si substrate, an AlyInxGazN (y?0, x>0) crystal as a mother crystal maintaining the zinc blende-type crystal structure and In dots having an In concentration higher than that of the AlyInxGazN (y?0, x>0) crystal as the mother crystal.
    Type: Application
    Filed: December 4, 2015
    Publication date: March 24, 2016
    Applicants: NITTO OPTICAL CO., LTD., SOLARTES Lab., LTD.
    Inventors: Kazutaka Terashima, Suzuka NISHIMURA, Muneyuki HIRAI
  • Publication number: 20150194569
    Abstract: A method for producing a GaN-based crystal includes forming a Zinc-blende type BP crystal layer on a Si substrate; forming an In-containing layer, on the BP crystal layer, with such a thickness as to keep the Zinc-blende type structure; and forming a Zinc-blende type GaN-based crystal layer on the In-containing layer. The In-containing layer is a metallic In layer having a thickness of 4 atom layers or less, an InGaN layer having a thickness of 2 nm or less, an InAl mixture layer having a thickness of 4 atom layers or less and containing Al at 10% or less, or an AlInGaN layer having a thickness of 2 nm or less and containing Al at 10% or less.
    Type: Application
    Filed: February 23, 2015
    Publication date: July 9, 2015
    Applicants: SOLARTES LAB., LTD., NITTO OPTICAL CO., LTD.
    Inventors: Kazutaka TERASHIMA, Suzuka NISHIMURA, Muneyuki HIRAI
  • Publication number: 20100297786
    Abstract: The present invention provides a method for manufacturing a compound semiconductor, which can improve a quality of each of thin film layers constituting a laminate structure. Each of first and second thin film layers is formed by growing a crystal of each thin film layer one over another on a silicon substrate 2 in first and second vapor deposition chambers 6a and 6b for exclusive use, corresponding to the respective thin film layers. As this crystal growth is carried out under conditions under which nothing other than raw gas materials used therein or those derived therefrom, such as stuck materials, precipitates, etc., exists in the first and second vapor deposition chambers 6a and 6b, a decrease in quality of the second thin film layer can be prevented because an unexpected reaction between the raw gas materials used for the first and second thin film layers, etc. can be suppressed.
    Type: Application
    Filed: March 20, 2007
    Publication date: November 25, 2010
    Applicants: Nitto Koki Kabushiki Kaisha, Yugen Kaisha Solates Labo
    Inventors: Kazutaka Terashima, Suzuka Nishimura, Hirosi Nagayoshi, Hiroshi Kawamura, Kazuhiro Haga
  • Patent number: 7696690
    Abstract: A short-wavelength light-emitting element such as an ultraviolet light-emitting element or blue light-emitting element is arranged in a container which has a window with a window board formed of calcium fluoride crystals. Fluoride crystals are ones which contain either metal or metal halide, or both of them. In a production method of fluoride crystals in which the cavity of a crucible is filled with raw material powder and this crucible is heated in a vertical Bridgman furnace, a production method of fluoride crystals of the present invention is the one in which the shortest diameter of a cross section of the cavity of the crucible is small. In a crucible, whose cavity is filled with raw material powder, heated in a vertical Bridgman furnace to produce fluoride crystals, a crucible is the one in which the shortest diameter of a section of the cavity is small.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: April 13, 2010
    Assignee: Japan Science and Technolgoy Agency
    Inventors: Kazutaka Terashima, Suzuka Nishimura
  • Publication number: 20060038194
    Abstract: In the present invention, a short-wavelength light-emitting element such as an ultraviolet light-emitting element or blue light-emitting element is arranged in a container which has a window with a window board formed of calcium fluoride crystals. According to the present invention, it is possible to obtain a reliable light-emitting element device. Fluoride crystals of the present invention are ones which contain either metal or metal halide, or both of them. In a production method of fluoride crystals in which the cavity of a crucible is filled with raw material powder and this crucible is heated in a vertical Bridgman furnace, a production method of fluoride crystals of the present invention is the one in which the shortest diameter of a cross section of the cavity of the crucible is small.
    Type: Application
    Filed: June 24, 2005
    Publication date: February 23, 2006
    Inventors: Kazutaka Terashima, Suzuka Nishimura
  • Patent number: 6194744
    Abstract: A method of growing a group III nitride semiconductor crystal layer includes a step of growing a first buffer layer composed of boron phosphide on a silicon single crystal substrate by a vapor phase growth method at a temperature of not lower than 200° C. and not higher than 700° C., a step of growing a second buffer layer composed of boron phosphide on the first buffer layer by a vapor phase growth method at a temperature of not lower than 750° C. and not higher than 1200° C., and a step of growing a crystal layer composed of group III nitride semiconductor crystal represented by general formula AlpGaqInrN (where 0≦p≦1, 0≦q≦1, 0≦r≦1, p+q+r=1) on the second buffer layer by a vapor phase growth method. A semiconductor device incorporating the group III nitride semiconductor crystal layer is provided.
    Type: Grant
    Filed: February 9, 2000
    Date of Patent: February 27, 2001
    Assignee: Showa Denko Kabushiki Kaisha
    Inventors: Takashi Udagawa, Kazutaka Terashima, Suzuka Nishimura, Takuji Tsuzaki
  • Patent number: 6069021
    Abstract: A method of growing a group III nitride semiconductor crystal layer includes a step of growing a first buffer layer composed of boron phosphide on a silicon single crystal substrate by a vapor phase growth method at a temperature of not lower than 200.degree. C. and not higher than 700.degree. C., a step of growing a second buffer layer composed of boron phosphide on the first buffer layer by a vapor phase growth method at a temperature of not lower than 750.degree. C. and not higher than 1200.degree. C., and a step of growing a crystal layer composed of group III nitride semiconductor crystal represented by general formula Al.sub.p Ga.sub.q In.sub.r N (where 0.ltoreq.p.ltoreq.1, 0.ltoreq.q.ltoreq.1, 0.ltoreq.r.ltoreq.1, p+q+r=1) on the second buffer layer by a vapor phase growth method. A semiconductor device incorporating the group III nitride semiconductor crystal layer is provided.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: May 30, 2000
    Assignee: Showa Denko K.K.
    Inventors: Kazutaka Terashima, Suzuka Nishimura, Takuji Tsuzaki, Takashi Udagawa