Abstract: An integrated circuit employing a plurality of current mode logic gates operable with a low power consumption and at a high speed is disclosed. The integrated circuit comprises a terminal for receiving a reference signal from the outside, an input stage current mode logic gate supplied with an input signal from the outside and the reference signal, an internal reference voltage generator circuit for generating an internal reference voltage having an intermediate value of binary logic levels of the output signals of the input stage current mode logic gate, and an internal stage current mode logic gate supplied with the output signal from the input stage logic gate and the internal reference voltage.