Abstract: In a multi-carrier system employing OFDM, for example DMT, an adaptive channel equalizer is normally used, operating in the frequency domain. The sampling clock is controlled so that the time delay between the transmitter and the receiver is effectively eliminated. If the information used to control the sampling clock is received from the equalized data stream, it will introduce an ambiguity between the operation of the channel equalizer and the mechanism used to control the sampling clock. Operation of the equalizer can mask an increasing time difference, between transmitter and receiver, which the sample clock controller should be tracking. The present invention eliminates the ambiguities in the operation of the equalizer and sample clock controller by preventing the equalizer accepting time differences which should be corrected by operation of the sample clock controller.

Abstract: In a multi-carrier system employing OFDM, for example DMT, an adaptive channel equalizer is normally used, operating in the frequency domain. The sampling clock is controlled so that the time delay between the transmitter and the receiver is effectively eliminated. If the information used to control the sampling clock is received from the equalized data stream, it will introduce an ambiguity between the operation of the channel equalizer and the mechanism used to control the sampling clock. Operation of the equalizer can mask an increasing time difference, between transmitter and receiver, which the sample clock controller should be tracking. The present invention eliminates the ambiguities in the operation of the equalizer and sample clock controller by preventing the equalizer from accepting time differences which should be corrected by operation of the sample clock controller.

Abstract: One problem, frequently encountered with VDSL transmission systems, is that upstream FEXT produced by system users having short wires can be very strong. Users having shorter wires get high bit rates whereas users having longer wires get low bit rates. In extreme cases it may happen that users with wire lengths greater than 1000 meter cannot transmit data upstream. The present invention provides a VDST transmission system with a plurality of modems. The modems are located at varying distances from a central station. There is a target bit rate for each modem. That modems on shorter wires have control means for reducing their transmit power. This reduces the FEXT produced by these modems enabling modems on longer wires to transmit at higher bit rates.

Abstract: A circuit, for digitizing an analogue signal includes an analogue to digital converter, a clip processor adapted to estimate a value for clipped digital signal samples, and a buffer adapted to dynamically store a plurality of digitized samples produced by the analogue to digital converter. The clip processor is adapted to read digitized samples from the buffer and replace clipped digitized samples with the estimated values, thereby mitigating the effects of clipping in an output of the circuit.