Patents by Inventor Svetlana Vitusevich

Svetlana Vitusevich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11668672
    Abstract: An apparatus for measuring electrical potentials of a liquid sample includes at least one field effect transistor having a source, a drain, and a gate, a substrate, and at least two intersecting nanowires of semiconductive material arranged on the substrate, each having a source and drain contact as a field effect transistor and a voltage applicator configured to apply a voltage between the respective source and drain contact. The cross section of the two nanowires has a shape of a triangle or a trapezium. A voltage applicator configured to apply a voltage to the substrate are arranged on the substrate. The nanowires are electrically insulated at least against the sample by a dielectric layer along their surface having a layer thickness between 5 and 40 nm, and at least one impurity is arranged in the dielectric layer as a bearing point which is capable of capturing charge carriers.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: June 6, 2023
    Assignee: FORSCHUNGSZENTRUM JUELICH GMBH
    Inventors: Svetlana Vitusevich, Ihor Zadorozhnyi
  • Patent number: 10859529
    Abstract: A device and a method for measuring small voltages and potentials on biological, chemical and other samples. The device comprises at least one field effect transistor including a source, a drain, a gate that is in contact with the sample and insulated by a gate dielectric from the conducting channel of the field effect transistor, means for applying a voltage between the source and the drain, and means for applying a bias voltage to the gate. The gate dielectric includes at least one attachment site in the interior thereof, which is able to trap charge carriers from the channel and, conversely, to release these to the channel.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: December 8, 2020
    Assignee: Forschungszentrum Juelich GmbH
    Inventors: Svetlana Vitusevich, Jing Li, Sergli Pud
  • Publication number: 20190170682
    Abstract: An apparatus for measuring electrical potentials of a liquid sample includes at least one field effect transistor having a source, a drain, and a gate, a substrate, and at least two intersecting nanowires of semiconductive material arranged on the substrate, each having a source and drain contact as a field effect transistor and a voltage applicator configured to apply a voltage between the respective source and drain contact. The cross section of the two nanowires has a shape of a triangle or a trapezium. A voltage applicator configured to apply a voltage to the substrate are arranged on the substrate. The nanowires are electrically insulated at least against the sample by a dielectric layer along their surface having a layer thickness between 5 and 40 nm, and at least one impurity is arranged in the dielectric layer as a bearing point which is capable of capturing charge carriers.
    Type: Application
    Filed: September 6, 2017
    Publication date: June 6, 2019
    Inventors: Svetlana VITUSEVICH, Ihor ZADOROZHNYI
  • Publication number: 20160274055
    Abstract: A device and a method for measuring small voltages and potentials on biological, chemical and other samples. The device comprises at least one field effect transistor including a source, a drain, a gate that is in contact with the sample and insulated by a gate dielectric from the conducting channel of the field effect transistor, means for applying a voltage between the source and the drain, and means for applying a bias voltage to the gate. The gate dielectric includes at least one attachment site in the interior thereof, which is able to trap charge carriers from the channel and, conversely, to release these to the channel.
    Type: Application
    Filed: October 15, 2014
    Publication date: September 22, 2016
    Inventors: Svetlana VITUSEVICH, Jing LI, Sergli PUD
  • Patent number: 8410792
    Abstract: A resonator arrangement has a conductive, semi-open outer housing, at an interior of which a conductive bar is provided disposed coaxially to the housing. At one end of the bar in a direction of a housing bottom, the bar has a die and, together with a dielectric and the housing bottom, forms a capacitor. The bar is short-circuited to the housing at another end, so that the bar and housing together form an LC oscillator circuit. Also disclosed is a method for analyzing a sample using a resonator arrangement.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: April 2, 2013
    Assignee: Forschungszentrum Juelich GmbH
    Inventors: Norbert Klein, Svetlana Vitusevich, Serhiy Danylyuk
  • Publication number: 20100327996
    Abstract: A resonator arrangement has a conductive, semi-open outer housing, at an interior of which a conductive bar is provided disposed coaxially to the housing. At one end of the bar in a direction of a housing bottom, the bar has a die and, together with a dielectric and the housing bottom, forms a capacitor. The bar is short-circuited to the housing at another end, so that the bar and housing together form an LC oscillator circuit. Also disclosed is a method for analyzing a sample using a resonator arrangement.
    Type: Application
    Filed: March 1, 2010
    Publication date: December 30, 2010
    Applicant: Forschungszentrum Juelich GmbH
    Inventors: Norbert Klein, Svetlana Vitusevich, Serhiy Danylyuk