Abstract: A semiconductor package includes a second leadframe assembly stacked above a first leadframe assembly, each leadframe assembly including a die pad, a plurality of leads and a semiconductor die attached to the die pad and electrically connected to the leads. An electrically insulative spacer separates the first and the second leadframe assemblies from one another. A mold compound embeds part of the first leadframe assembly, part of the second leadframe assembly and the electrically insulative spacer.

Abstract: A semiconductor package includes a second leadframe assembly stacked above a first leadframe assembly, each leadframe assembly including a die pad, a plurality of leads and a semiconductor die attached to the die pad and electrically connected to the leads. An electrically insulative spacer separates the first and the second leadframe assemblies from one another. A mold compound embeds part of the first leadframe assembly, part of the second leadframe assembly and the electrically insulative spacer.

Abstract: A semiconductor package includes a second leadframe assembly stacked above a first leadframe assembly, each leadframe assembly including a die pad, a plurality of leads and a semiconductor die attached to the die pad and electrically connected to the leads. A spacer separates the leadframe assemblies from one another. A single mold compound embeds part of the first leadframe assembly, part of the second leadframe assembly and the spacer. A portion of the leads of both leadframe assemblies are uncovered by the mold compound to form terminals of the semiconductor package. A side of both die pads is uncovered by the mold compound.

Abstract: A semiconductor package includes a second leadframe assembly stacked above a first leadframe assembly, each leadframe assembly including a die pad, a plurality of leads and a semiconductor die attached to the die pad and electrically connected to the leads. A spacer separates the leadframe assemblies from one another. A single mold compound embeds part of the first leadframe assembly, part of the second leadframe assembly and the spacer. A portion of the leads of both leadframe assemblies are uncovered by the mold compound to form terminals of the semiconductor package. A side of both die pads is uncovered by the mold compound.

Abstract: An electronic device comprising a package comprising an encapsulated electronic chip, at least one at least partially exposed electrically conductive carrier lead for mounting the package on and electrically connecting the electronic chip to a carrier, and at least one at least partially exposed electrically conductive connection lead, and an electronic member stacked with the package so as to be mounted on and electrically connected to the package by the at least one connection lead.

Abstract: An electronic device comprising a package comprising an encapsulated electronic chip, at least one at least partially exposed electrically conductive carrier lead for mounting the package on and electrically connecting the electronic chip to a carrier, and at least one at least partially exposed electrically conductive connection lead, and an electronic member stacked with the package so as to be mounted on and electrically connected to the package by the at least one connection lead.

Abstract: A method of forming an integrated circuit package, such as a Flip Chip package, in which a void is provided in the underfill material in the central region of the package between the chip or die and the substrate on which the chip or die is mounted. This reduces delamination of the package as a result of moisture.

Abstract: An integrated circuit device includes a semiconductor chip having an active surface with a plurality of chip contact pads, a rewiring substrate and an electrically conductive inductor coil for magnetically aligning the semiconductor chip with the rewiring substrate.

Abstract: A method of forming an integrated circuit package, such as a Flip Chip package, in which a void is provided in the underfill material in the central region of the package between the chip or die and the substrate on which the chip or die is mounted. This reduces delamination of the package as a result of moisture.

Abstract: An integrated circuit device includes a semiconductor chip having an active surface with a plurality of chip contact pads, a rewiring substrate and an electrically conductive inductor coil for magnetically aligning the semiconductor chip with the rewiring substrate.

Abstract: A semiconductor package includes a substrate and a semiconductor chip which includes an active surface with a plurality of chip contact areas. The chip is electrically connected to the substrate. The substrate includes a sheet of core material, a plurality of upper conducting traces and upper contact pads on its upper surface, a second plurality of lower conductive traces and external contact areas on its bottom surface. A plurality of conducting vias connect the conducting traces and lower conducting traces. The substrate also includes a plurality of vent holes and a layer of solder resist covering the upper and lower surfaces of the substrate leaving the contact areas free from solder resist.

Abstract: A method of forming an integrated circuit package, such as a Flip Chip package, in which a void is provided in the underfill material in the central region of the package between the chip or die and the substrate on which the chip or die is mounted. This reduces delamination of the package as a result of moisture.