Abstract: A device with a circuit board including a top surface and a bottom surface, a package including a bottom surface affixed relative to the top surface of the circuit board, and an antenna structure affixed relative to the bottom surface of the circuit board. The antenna structure extends through an opening in the circuit board.

Abstract: In examples, a semiconductor die comprises a semiconductor substrate having a surface, the surface having first and second surface portions, and a radiator layer on the surface. The radiator layer comprises a metal member having a first metal member portion above the first surface portion and a second metal member portion above the second surface portion, a first distance between the first metal member portion and the first surface portion, and a second distance between the second metal member portion and the second surface portion, the first distance less than the second distance. The radiator layer includes first and second electrodes. The radiator layer includes a piezoelectric layer extending along a length of the radiator layer and on each of the first and second electrodes, the piezoelectric layer between the first and second metal members and the semiconductor substrate.

Abstract: In examples, an electronic device includes an antenna and a transmitter line. The transmitter line includes a double-tuned transformer having first and second windings, the first winding having first and second ends, the second winding having third and fourth ends, and the third end coupled to the antenna. The transmitter line includes a first capacitor coupled between the first and second ends. The transmitter line also includes a second capacitor coupled between the third and fourth ends, and a switch coupled between the first end and a reference terminal.

Abstract: Electrical balance duplexers (EBDs). An example EBD includes a differential TX port coupled to a first coil, a differential RX port coupled to a second coil, a differential ANT port coupled to a third coil, and a differential BAL port coupled to a fourth coil. In some cases, the first and second coils are arranged such that magnetic flux cancellation is achieved between the two, thus isolating the TX port from the RX port. In some cases, DC isolation exists between the coils. During operation, the first coil may electromagnetically couple with the third coil and the fourth coil, and the second coil may electromagnetically couple with the third coil and the fourth coil. In some example cases, the first and second coils are each in their own metallization layer, and the third and fourth coils are in the same layer.

Abstract: A bidirectional phase shifter includes a differential quadrature hybrid coupler, a switch network, and a differential reflection type phase shifter (RTPS). The differential quadrature hybrid coupler includes a first phase input/output (I/O) port, an inverse first phase I/O port, a second phase I/O port, and an inverse second phase I/O port. The switch network is coupled to the first phase I/O port, the inverse first phase I/O port, the second phase I/O port, and the inverse second phase I/O port. The differential RTPS including a differential I/O port coupled to the switch network.

Abstract: An oscillator circuit includes a bulk acoustic wave resonator, a differential active inductor circuit, and a gain circuit. The differential active inductor circuit is configured to bias the bulk acoustic wave resonator. The differential active inductor circuit is coupled between the bulk acoustic wave resonator and a power supply terminal. The gain circuit is coupled to the bulk acoustic wave resonator.

Abstract: In a described example, an apparatus includes: a semiconductor device mounted to a device side surface of a package substrate, the package substrate having a board side surface opposite the device side surface; an antenna module mounted to the package substrate and coupled to the semiconductor device; and mold compound covering the semiconductor device and a portion of the package substrate.

Abstract: An integrated circuit includes a semiconductor substrate, a metal layer, an inductor in the metal layer, and a shield above the inductor. The metal layer is a first metal layer; and the shield may be is in a second metal layer above the first metal layer. The shield may include a plurality of metal strips substantially perpendicular to metal lines of the inductor.

Abstract: An example apparatus includes: an on-off keying (OOK) modulator including: a first transistor including a first control terminal; a second transistor including a first current terminal, a second current terminal, and a second control terminal, the first current terminal coupled to the first control terminal; a third transistor including a third current terminal, a fourth current terminal, and a third control terminal, the third current terminal coupled to the first control terminal; a fourth transistor including a fifth current terminal, the fifth current terminal coupled to the second current terminal; and a fifth transistor including a sixth current terminal, the sixth current terminal coupled to the fourth current terminal.

Abstract: An example apparatus includes: a compensation circuit including: a current compensation output, a first transistor with a first current terminal and a first control terminal, the first current terminal coupled to the current compensation output, and a resistor ladder with a tap terminal coupled to the first control terminal, a current mirror circuit having a mirror input and a mirror output, the mirror input coupled to the current compensation output, and a rectification circuit having an input coupled to the mirror output.

Abstract: A device with a substrate, the substrate including opposite first and second surfaces, the first surface including metal pads, a dielectric layer between the first and second surfaces, and an opening extending through the dielectric layer and connecting between the first and second surfaces, the opening including first and second ridge structures, each of the first and second ridge structure extending with a uniform cross-section along the opening.

Abstract: An interposer acts as a buffer zone between a transceiver IC and a dielectric waveguide interconnect and establishes two well-defined reference planes that can be optimized independently. The interposer includes a block of material having: a first interface region to interface with an antenna coupled to an integrated circuit (IC); and a second interface region to interface to the dielectric waveguide. An interface waveguide is formed by a defined region positioned within the block of material between the first interface region and the second interface region.

Abstract: An apparatus includes a first primary coil, a second primary coil, and a secondary coil. The first and second primary coils each include a first, second, and third portion. The secondary coil includes a first and second portion in a first wafer layer, which are coupled together by a bridge in a second wafer layer. The second portion of the first primary coil is nested inside the first portion of the secondary coil in the first wafer layer. The second portion of the second primary coil is nested inside the second portion of the secondary coil in the first wafer layer. At least parts of the first and third portions of the first primary coil are adjacent the second portion of the secondary coil, and at least parts of the first and third portions of the second primary coil are adjacent the first portion of the secondary coil.

Abstract: An example apparatus includes: an on-off keying (OOK) modulator including: a first transistor including a first control terminal; a second transistor including a first current terminal, a second current terminal, and a second control terminal, the first current terminal coupled to the first control terminal; a third transistor including a third current terminal, a fourth current terminal, and a third control terminal, the third current terminal coupled to the first control terminal; a fourth transistor including a fifth current terminal, the fifth current terminal coupled to the second current terminal; and a fifth transistor including a sixth current terminal, the sixth current terminal coupled to the fourth current terminal.

Abstract: In accordance with at least one example of the description, a device includes a substrate and a linear array of transducer elements across the substrate and forming a cavity region. The cavity region is bounded by a first termination region and a second termination region. The linear array of transducer elements includes a transducer element having a front-end-of-line (FEOL) portion that is formed by a FEOL process and a back-end-of-line (BEOL) portion that is formed by an n-layer BEOL process. The BEOL portion of the transducer element includes a ferroelectric capacitor and a conductive element. The conductive element is formed by metal layer-n of the n-layer BEOL process, where n denotes an integer greater than 3.

Abstract: In described examples of a signal equalizer, a first filter stage is configured to perform adaptive equalization of crosstalk between a first signal component and a second signal component of a complex signal. A second filter stage is coupled serially to the first filter stage. The second equalizer stage is configured to perform separate adaptive equalization of the first signal component and separate adaptive equalization of the second signal component.

Abstract: In an example, a system includes a BAW resonator. The system also includes a first heater configured to heat the BAW resonator, where the first heater is controlled by a first control loop. The system includes a circuit coupled to the BAW resonator. The system also includes a second heater configured to heat the circuit, where the second heater is controlled by a second control loop.

Abstract: A system includes a first differential amplifier and a first transformer with a primary coil coupled to an output of the first differential amplifier and with a secondary coil coupled to a load. The system also includes a second differential amplifier and a second transformer with a primary coil coupled to an output of the second differential amplifier and with a secondary coil coupled in series with the secondary coil of the first transformer. The system also includes a tuning network coupled to a center tap node between the secondary coil of the first transformer and the secondary coil of the second transformer.

Abstract: An antenna integrated in a device package is formed such that at least a portion of the antenna is elevated with respect to a substrate of the device package. The entire antenna and its functionality are positioned within a space extending vertically upwardly from a footprint of the substrate that contains circuitry of the device. The boundary of the space is defined by the perimeter of an over mold positioned on the substrate and encapsulating the circuitry.

Abstract: In described examples, an integrated circuit includes an on-off keying (OOK) digital isolator, which includes a first circuitry, a multiplexer, an OOK modulator, an isolation barrier, an OOK envelope detector, and a second circuitry. The first circuitry generates and outputs a calibration signal. The multiplexer has a data signal input, and an input coupled to a first circuitry output. An OOK modulator input is coupled to a multiplexer output. An isolation barrier input is coupled to an OOK modulator output. An OOK envelope detector input is coupled to an isolation barrier output. The second circuitry includes an input coupled to an OOK envelope detector output, and an output coupled to an OOK envelope detector control input. The second circuitry detects a duty cycle distortion (DCD) of the OOK envelope detector output, and outputs a control signal to change the OOK envelope detector output's duty cycle based on the detected DCD.