Patents by Inventor Swaminathan Sankaran

Swaminathan Sankaran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11368124
    Abstract: An oscillator includes: a bulk-acoustic wave (BAW) resonator having a first BAW resonator terminal and a second BAW resonator terminal; and an active circuit coupled to the first and second BAW resonator terminals and having a series resonance topology with: a first transistor; a second transistor; a first resistor; a second resistor; a capacitive network coupled to first and second BAW resonator terminals and to respective current terminals of the first and second transistors; and an inductor having a first inductor terminal and a second inductor terminal, the first inductor terminal coupled to the capacitive network, and the second inductor terminal coupled to ground terminal.
    Type: Grant
    Filed: March 2, 2021
    Date of Patent: June 21, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sachin Kalia, Tolga Dinc, Bichoy Bahr, Swaminathan Sankaran
  • Publication number: 20220189873
    Abstract: An electronic device has a substrate and first and second metallization levels with a resonant circuit. The first metallization level has a first dielectric layer on a side of the substrate, and a first metal layer on the first dielectric layer. The second metallization level has a second dielectric layer on the first dielectric layer and the first metal layer, and a second metal layer on the second dielectric layer. The electronic device includes a first plate in the first metal layer, and a second plate spaced apart from the first plate in the second metal layer to form a capacitor. The electronic device includes a winding in one of the first and second metal layers and coupled to one of the first and second plates in a resonant circuit.
    Type: Application
    Filed: December 12, 2020
    Publication date: June 16, 2022
    Inventors: Klaas De Haan, Mikhail Valeryevich Ivanov, Tobias Bernhard Fritz, Swaminathan Sankaran, Thomas Dyer Bonifield
  • Publication number: 20220173700
    Abstract: A system includes a first differential amplifier and a first transformer with a primary coil coupled to an output of the first differential amplifier and with a secondary coil coupled to a load. The system also includes a second differential amplifier and a second transformer with a primary coil coupled to an output of the second differential amplifier and with a secondary coil coupled in series with the secondary coil of the first transformer. The system also includes a tuning network coupled to a center tap node between the secondary coil of the first transformer and the secondary coil of the second transformer.
    Type: Application
    Filed: December 2, 2020
    Publication date: June 2, 2022
    Inventors: Tolga DINC, Sachin KALIA, Swaminathan SANKARAN, Baher HAROUN
  • Publication number: 20220166144
    Abstract: An antenna integrated in a device package is formed such that at least a portion of the antenna is elevated with respect to a substrate of the device package. The entire antenna and its functionality are positioned within a space extending vertically upwardly from a footprint of the substrate that contains circuitry of the device. The boundary of the space is defined by the perimeter of an over mold positioned on the substrate and encapsulating the circuitry.
    Type: Application
    Filed: May 24, 2021
    Publication date: May 26, 2022
    Inventors: Hassan Omar Ali, Richard George Wallace, Benjamin Stassen Cook, Swaminathan Sankaran, Sanjay Mohan
  • Patent number: 11342928
    Abstract: A method, providing an oscillator output signal to reference inputs of a PLL and an output clock circuit; providing a first divisor value to a control input of the PLL to regulate a closed loop that includes a physics cell, a receiver, and the PLL; providing a second divisor value to a control input of the output clock circuit to control an output frequency of an output clock signal; shifting the first divisor value in a first direction to cause a perturbation in the closed loop; shifting the second divisor value in an opposite second direction to counteract a response of the closed loop to the perturbation and to regulate the output frequency of the output clock signal; and based on the receiver output signal, analyzing the response of the closed loop to the perturbation.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: May 24, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Bichoy Bahr, Baher Haroun, Swaminathan Sankaran, Juan Alejandro Herbsommer
  • Publication number: 20220150093
    Abstract: In described examples of a signal equalizer, a complex signal having a first signal component and a second signal component is received from a communication channel. Adaptive equalization of crosstalk between the first signal component and the second signal component is performed using a single complex tap of a feedforward equalizer. A feedforward filter with real only taps converts the channel into a minimum phase channel that has postcursor interference only so that a low complexity decision feedback filter with all complex taps can easily eliminate the postcursor interreference.
    Type: Application
    Filed: November 12, 2020
    Publication date: May 12, 2022
    Inventors: Anand Dabak, Mahmoud Abdelmoneim Abdelmoneim Elgenedy, Timothy Mark Schmidl, Swaminathan Sankaran
  • Publication number: 20220149892
    Abstract: In described examples of a signal equalizer, a first filter stage is configured to perform adaptive equalization of crosstalk between a first signal component and a second signal component of a complex signal. A second filter stage is coupled serially to the first filter stage.
    Type: Application
    Filed: November 12, 2020
    Publication date: May 12, 2022
    Inventors: Anand Dabak, Mahmoud Abdelmoneim Abdelmoneim Elgenedy, Timothy Mark Schmidl, Swaminathan Sankaran
  • Patent number: 11322217
    Abstract: A track and hold circuit includes a signal input terminal, a clock input terminal, an output terminal, a transistor, and a bootstrapping circuit with a transformer. The transistor includes a source, a drain, and a gate, where the source is coupled to the signal input terminal, and the drain is coupled to the output terminal. The transformer includes a primary winding coupled to the clock input terminal, and a secondary winding. The secondary winding is coupled between the source and the gate to control a gate-source voltage of the transistor.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: May 3, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ashwin Raghunathan, Marco Corsi, Baher Haroun, Seyed Miaad Seyed Aliroteh, Swaminathan Sankaran, Robert Floyd Payne
  • Patent number: 11316476
    Abstract: A frequency multiplier includes an input section to receive a quadrature phase input signal having an input frequency, a mixer section coupled to the input section by a common mode node that forms a path for the common mode signal current to flow to the mixer section and magnetically coupled to the common mode node or capacitively coupled to the input section to generate a differential switching voltage at odd multiples of twice the input frequency, which switching voltage is applied to inputs of the mixer section, and an output section magnetically coupled to the mixer section, the output section being configured to generate an output voltage having a dominate frequency and sub-dominate frequencies spaced apart by the first multiple, the dominate frequency of the output voltage being a second multiple of the input frequency, where the second multiple is greater than the first multiple. Various arrangements are provided.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: April 26, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sachin Kalia, Tolga Dine, Swaminathan Sankaran
  • Patent number: 11258154
    Abstract: An apparatus includes a substrate containing a cavity and a dielectric structure covering at least a portion of the cavity. The cavity is hermetically sealed. The apparatus also may include a launch structure formed on the dielectric structure and outside the hermetically sealed cavity. The launch structure is configured to cause radio frequency (RF) energy flowing in a first direction to enter the hermetically sealed cavity through the dielectric structure in a direction orthogonal to the first direction.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: February 22, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Adam Joseph Fruehling, Benjamin Stassen Cook, Juan Alejandro Herbsommer, Swaminathan Sankaran
  • Patent number: 11228280
    Abstract: A device includes a MEMS resonator and oscillator circuit coupled to the MEMS resonator. The circuit includes a first transistor having a first control terminal and first and second current terminals, and a second transistor having a second control terminal and third and fourth current terminals. The circuit includes a resonator coupling network configured to inductively couple MEMS resonator terminals to the first and third current terminals, and to couple the first and third current terminals. The circuit includes a control terminal coupling network configured to couple the first and second control terminals, and to reduce a voltage swing at the first and second control terminals relative to a voltage swing at the first and third current terminals. The circuit includes a second terminal coupling network configured to couple the second and fourth current terminals. A second terminal coupling network resonant frequency is approximately that of MEMS resonator.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: January 18, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Bichoy Bahr, Sachin Kalia, Swaminathan Sankaran
  • Publication number: 20210376838
    Abstract: In described examples, a method of operating a charge pump includes a first control signal deactivating a first transistor, and the first control signal's logical complement activating a second transistor to reset the first transistor's DC bias voltage. The first control signal's logical complement deactivates the second transistor, and the first control signal provides a bias voltage to the first transistor to activate it, causing current to be transmitted from an input voltage to an output terminal. A second control signal deactivates a third transistor, and the second control signal's logical complement activates a fourth transistor to reset the second transistor's DC bias voltage. The second control signal's logical complement deactivates the fourth transistor, and the second control signal provides a bias voltage to the third transistor to activate it, causing current to be transmitted from the output terminal to a ground.
    Type: Application
    Filed: August 9, 2021
    Publication date: December 2, 2021
    Inventors: Salvatore Luciano Finocchiaro, Tolga Dinc, Gerd Schuppener, Siraj Akhtar, Swaminathan Sankaran, Baher Haroun
  • Patent number: 11171636
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to provide phase imbalance correction. An example system includes a phase detector to obtain a first signal and generate a first output, a comparator coupled to the phase detector, the comparator to generate a second output based on the first output, and an amplifier coupled to the comparator, the amplifier to adjust a first phase response of the first signal based on the second output.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: November 9, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Tolga Dinc, Salvatore Luciano Finocchiaro, Gerd Schuppener, Siraj Akhtar, Swaminathan Sankaran, Baher Haroun
  • Patent number: 11159204
    Abstract: A removable module includes circuitry, a near field communication (NFC) coupler to provide a data signal to the circuitry, and a second NFC coupler to supply operating voltage to the circuitry.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: October 26, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Mark William Morgan, Swaminathan Sankaran, Benjamin Stassen Cook, Ali Djabbari, Lutz Albrecht Naumann
  • Patent number: 11128345
    Abstract: A system is provided in which a first waveguide has a first resonator coupled to an end of the first waveguide. A second waveguide has a second resonator coupled to the second waveguide. The first resonator is spaced apart from the second resonator by a gap distance. Transmission of a signal propagated by the first waveguide across the gap to the second waveguide is enhanced by a confined near field mode magnetic field produced by the first resonator in response to the propagating wave that is coupled to the second resonator.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: September 21, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Benjamin Stassen Cook, Swaminathan Sankaran
  • Patent number: 11128023
    Abstract: A device includes a multilayer substrate having a first surface and a second surface opposite the first surface. An integrated circuit is mounted on the second surface of the multilayer substrate, the integrated circuit having transmission circuitry configured to process millimeter wave signals. A substrate waveguide having a substantially solid wall is formed within a portion of the multilayer substrate perpendicular to the first surface. The substrate waveguide has a first end with the wall having an edge exposed on the first surface of the multilayer substrate. A reflector is located in one of the layers of the substrate and is coupled to an edge of the wall on an opposite end of the substrate waveguide.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: September 21, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hassan Omar Ali, Juan Alejandro Herbsommer, Benjamin Stassen Cook, Vikas Gupta, Athena Lin, Swaminathan Sankaran
  • Patent number: 11088696
    Abstract: In described examples, a method of operating a charge pump includes a first control signal deactivating a first transistor, and the first control signal's logical complement activating a second transistor to reset the first transistor's DC bias voltage. The first control signal's logical complement deactivates the second transistor, and the first control signal provides a bias voltage to the first transistor to activate it, causing current to be transmitted from an input voltage to an output terminal. A second control signal deactivates a third transistor, and the second control signal's logical complement activates a fourth transistor to reset the second transistor's DC bias voltage. The second control signal's logical complement deactivates the fourth transistor, and the second control signal provides a bias voltage to the third transistor to activate it, causing current to be transmitted from the output terminal to a ground.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: August 10, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Salvatore Luciano Finocchiaro, Tolga Dine, Gerd Schuppener, Siraj Akhtar, Swaminathan Sankaran, Baher Haroun
  • Publication number: 20210203331
    Abstract: In described examples, a method of operating a transceiver with a transmitter and a receiver includes generating a frequency reference. In the transmitter: A phase locked loop (PLL) generates a first voltage controlled oscillator (VCO) control voltage responsive to the frequency reference. A VCO in the transmitter generates a transmitter VCO signal responsive to the first VCO control voltage, and the PLL is locked to the transmitter VCO signal. In the receiver: A signal is received. A receiver VCO generates a receiver VCO signal responsive to the first or a second VCO control voltage. The receiver VCO signal is multiplied by the received signal to generate an I component, and by the received signal phase shifted by 90° to generate a Q component. The second VCO control signal is generated responsive to the I component and the Q component.
    Type: Application
    Filed: December 31, 2019
    Publication date: July 1, 2021
    Inventors: Salvatore Luciano Finocchiaro, Timothy Schmidl, Tolga Dinc, Gerd Schuppener, Siraj Akhtar, Swaminathan Sankaran, Baher Haroun
  • Publication number: 20210203329
    Abstract: In described examples, a method of operating a charge pump includes a first control signal deactivating a first transistor, and the first control signal's logical complement activating a second transistor to reset the first transistor's DC bias voltage. The first control signal's logical complement deactivates the second transistor, and the first control signal provides a bias voltage to the first transistor to activate it, causing current to be transmitted from an input voltage to an output terminal. A second control signal deactivates a third transistor, and the second control signal's logical complement activates a fourth transistor to reset the second transistor's DC bias voltage. The second control signal's logical complement deactivates the fourth transistor, and the second control signal provides a bias voltage to the third transistor to activate it, causing current to be transmitted from the output terminal to a ground.
    Type: Application
    Filed: December 31, 2019
    Publication date: July 1, 2021
    Inventors: Salvatore Luciano Finocchiaro, Tolga Dinc, Gerd Schuppener, Siraj Akhtar, Swaminathan Sankaran, Baher Haroun
  • Publication number: 20210151847
    Abstract: An interposer acts as a buffer zone between a transceiver IC and a dielectric waveguide interconnect and establishes two well-defined reference planes that can be optimized independently. The interposer includes a block of material having: a first interface region to interface with an antenna coupled to an integrated circuit (IC); and a second interface region to interface to the dielectric waveguide. An interface waveguide is formed by a defined region positioned within the block of material between the first interface region and the second interface region.
    Type: Application
    Filed: January 4, 2021
    Publication date: May 20, 2021
    Inventors: Baher Haroun, Juan Alejandro Herbsommer, Gerd Schuppener, Swaminathan Sankaran