Patents by Inventor Swamy Gowda
Swamy Gowda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10917469Abstract: A computer-implemented method for efficiently accessing a secondary storage in highly available clustered storage environment may include receiving a client-initiated data request at a secondary server coupled to a secondary storage; determining request information about the client-initiated data request; determining with the secondary server whether to process the client-initiated data request on the secondary storage based on the determined request information; and responsive to determining that the secondary server should process the client-initiated data request, processing the client-initiated data request by the secondary server to retrieve data from the secondary storage.Type: GrantFiled: March 22, 2017Date of Patent: February 9, 2021Assignee: Western Digital Technologies, Inc.Inventors: Manoj Kumar Tiwari, Avik Sil, Swamy Gowda Jayaramu, Shibabrata Mondal
-
Publication number: 20180278685Abstract: A computer-implemented method for efficiently accessing a secondary storage in highly available clustered storage environment may include receiving a client-initiated data request at a secondary server coupled to a secondary storage; determining request information about the client-initiated data request; determining with the secondary server whether to process the client-initiated data request on the secondary storage based on the determined request information; and responsive to determining that the secondary server should process the client-initiated data request, processing the client-initiated data request by the secondary server to retrieve data from the secondary storage.Type: ApplicationFiled: March 22, 2017Publication date: September 27, 2018Inventors: Manoj Kumar Tiwari, Avik Sil, Swamy Gowda Jayaramu, Shibabrata Mondal
-
Patent number: 9898196Abstract: A first portion of an asymmetric memory is configured as temporary storage for application data units with sizes corresponding to a small memory block that is smaller than the size of a logical write unit associated with the asymmetric memory. A portion of the remaining asymmetric memory is configured as a reconciled storage for application data units with varying sizes. A first application data unit is received for writing to the asymmetric memory. Based on computing the size of the first application data unit as corresponding to the small memory block, the first application data unit is written to the temporary storage. Upon determining that a threshold is reached, a memory write operation is performed for writing the application data units from the temporary storage to the reconciled storage. The application data units written to the reconciled storage are removed from the temporary storage.Type: GrantFiled: March 22, 2016Date of Patent: February 20, 2018Assignee: Virident Systems, LLCInventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Swamy Gowda
-
Patent number: 9811285Abstract: Data is stored as a first collection of memory blocks distributed across a first set of memory devices. It is determined that a first memory device in the first set is in a degraded state. Data is recovered corresponding to a first memory block in the first collection of memory blocks that is stored in the first memory device, which is configured to include a first number of memory blocks. The recovered data is stored in a second memory device as a new memory block, which is added to the first collection of memory blocks. The first memory device is removed from the first set and reconfigured with a second number of memory blocks that is less than the first number of memory blocks. Memory blocks in a second collection of memory blocks distributed across a second set of memory devices is stored in the reconfigured first memory device.Type: GrantFiled: March 11, 2016Date of Patent: November 7, 2017Assignee: VIRIDENT SYSTEMS, LLCInventors: Vijay Karamcheti, Swamy Gowda, Rajendra Prasad Mishra, Shibabrata Mondal
-
Patent number: 9734027Abstract: First data is received for storing in a first asymmetric memory device. A first writing phase is identified as a current writing phase. A first segment included in the first asymmetric memory device is identified as next segment available for writing data. The first data is written to the first segment. Information associated with the first segment is stored, along with information indicating that the first segment is written in the first writing phase. Second data is received for storing in the asymmetric memory. A second segment included in the first asymmetric memory device is identified as the next segment available for writing data. The second data is written to the second segment. Information associated with the second segment and the second memory block is stored along with information indicating that the second segment is written in the second writing phase.Type: GrantFiled: September 11, 2015Date of Patent: August 15, 2017Assignee: Virident Systems, LLCInventors: Vijay Karamcheti, Shibabrata Mondal, Swamy Gowda
-
Patent number: 9304908Abstract: A first portion of an asymmetric memory is configured as temporary storage for application data units with sizes corresponding to a small memory block that is smaller than the size of a logical write unit associated with the asymmetric memory. A portion of the remaining asymmetric memory is configured as a reconciled storage for application data units with varying sizes. A first application data unit is received for writing to the asymmetric memory. Based on computing the size of the first application data unit as corresponding to the small memory block, the first application data unit is written to the temporary storage. Upon determining that a threshold is reached, a memory write operation is performed for writing the application data units from the temporary storage to the reconciled storage. The application data units written to the reconciled storage are removed from the temporary storage.Type: GrantFiled: March 25, 2015Date of Patent: April 5, 2016Assignee: Virident Systems Inc.Inventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Swamy Gowda
-
Patent number: 9286002Abstract: Data is stored as a first collection of memory blocks distributed across a first set of memory devices. It is determined that a first memory device in the first set is in a degraded state. Data is recovered corresponding to a first memory block in the first collection of memory blocks that is stored in the first memory device, which is configured to include a first number of memory blocks. The recovered data is stored in a second memory device as a new memory block, which is added to the first collection of memory blocks. The first memory device is removed from the first set and reconfigured with a second number of memory blocks that is less than the first number of memory blocks. Memory blocks in a second collection of memory blocks distributed across a second set of memory devices is stored in the reconfigured first memory device.Type: GrantFiled: March 15, 2013Date of Patent: March 15, 2016Assignee: Virident Systems Inc.Inventors: Vijay Karamcheti, Swamy Gowda, Rajendra Prasad Mishra, Shibabrata Mondal
-
Publication number: 20160004612Abstract: First data is received for storing in a first asymmetric memory device. A first writing phase is identified as a current writing phase. A first segment included in the first asymmetric memory device is identified as next segment available for writing data. The first data is written to the first segment. Information associated with the first segment is stored, along with information indicating that the first segment is written in the first writing phase. Second data is received for storing in the asymmetric memory. A second segment included in the first asymmetric memory device is identified as the next segment available for writing data. The second data is written to the second segment. Information associated with the second segment and the second memory block is stored along with information indicating that the second segment is written in the second writing phase.Type: ApplicationFiled: September 11, 2015Publication date: January 7, 2016Inventors: Vijay Karamcheti, Shibabrata Mondal, Swamy Gowda
-
Patent number: 9135164Abstract: First data is received for storing in a first asymmetric memory device. A first writing phase is identified as a current writing phase. A first segment included in the first asymmetric memory device is identified as next segment available for writing data. The first data is written to the first segment. Information associated with the first segment is stored, along with information indicating that the first segment is written in the first writing phase. Second data is received for storing in the asymmetric memory. A second segment included in the first asymmetric memory device is identified as the next segment available for writing data. The second data is written to the second segment. Information associated with the second segment and the second memory block is stored along with information indicating that the second segment is written in the second writing phase.Type: GrantFiled: March 15, 2013Date of Patent: September 15, 2015Assignee: Virident Systems Inc.Inventors: Vijay Karamcheti, Shibabrata Mondal, Swamy Gowda
-
Patent number: 9021188Abstract: A first portion of an asymmetric memory is configured as temporary storage for application data units with sizes corresponding to a small memory block that is smaller than the size of a logical write unit associated with the asymmetric memory. A portion of the remaining asymmetric memory is configured as a reconciled storage for application data units with varying sizes. A first application data unit is received for writing to the asymmetric memory. Based on computing the size of the first application data unit as corresponding to the small memory block, the first application data unit is written to the temporary storage. Upon determining that a threshold is reached, a memory write operation is performed for writing the application data units from the temporary storage to the reconciled storage. The application data units written to the reconciled storage are removed from the temporary storage.Type: GrantFiled: March 15, 2013Date of Patent: April 28, 2015Assignee: Virident Systems Inc.Inventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Swamy Gowda
-
Patent number: 8996796Abstract: A first portion of an asymmetric memory is configured as temporary storage for application data units with sizes corresponding to a small memory block that is smaller than the size of a logical write unit associated with the asymmetric memory. A portion of the remaining asymmetric memory is configured as a reconciled storage for application data units with varying sizes. A first application data unit is received for writing to the asymmetric memory. Based on computing the size of the first application data unit as corresponding to the small memory block, the first application data unit is written to the temporary storage. Upon determining that a threshold is reached, a memory write operation is performed for writing the application data units from the temporary storage to the reconciled storage. The application data units written to the reconciled storage are removed from the temporary storage.Type: GrantFiled: March 15, 2013Date of Patent: March 31, 2015Assignee: Virident Systems Inc.Inventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Swamy Gowda
-
Publication number: 20140281138Abstract: First data is received for storing in a first asymmetric memory device. A first writing phase is identified as a current writing phase. A first segment included in the first asymmetric memory device is identified as next segment available for writing data. The first data is written to the first segment. Information associated with the first segment is stored, along with information indicating that the first segment is written in the first writing phase. Second data is received for storing in the asymmetric memory. A second segment included in the first asymmetric memory device is identified as the next segment available for writing data. The second data is written to the second segment. Information associated with the second segment and the second memory block is stored along with information indicating that the second segment is written in the second writing phase.Type: ApplicationFiled: March 15, 2013Publication date: September 18, 2014Inventors: Vijay Karamcheti, Shibabrata Mondal, Swamy Gowda