Patents by Inventor Swaroop Admusumilli

Swaroop Admusumilli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7360076
    Abstract: A cryptographic processing system includes a cipher circuit and hash circuit. An input control unit and output control unit work together to process data packets in a pipelined manner wherein the data packets move through the processing system in a single-pass. The input control unit manages data received from a read interface and the initiation of cipher processing of the data in the cipher circuit. The output control unit manages data output to a write interface and the hash processing of the data in the hash circuit. Data moves through the cipher circuit in clear data and cipher data form so that the output control unit may selectively send clear data and/or cipher data to the hash circuit and to an output FIFO memory buffer, which handles final processing under the control of the output control unit prior to sending fully processed data to the write interface.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: April 15, 2008
    Assignee: ITT Manufacturing Enterprises, Inc.
    Inventors: Satish N. Anand, Hemanshu Bhatnagar, Swaroop Admusumilli, James Darren Parker
  • Patent number: 7266703
    Abstract: A cryptographic processing system includes a cipher circuit and hash circuit. An input control unit and output control unit work together to process data packets in a pipelined manner wherein the data packets move through the processing system in a single-pass. The input control unit manages data received from a read interface and the initiation of cipher processing of the data in the cipher circuit. The output control unit manages data output to a write interface and the hash processing of the data in the hash circuit. Data moves through the cipher circuit in clear data and cipher data form so that the output control unit may selectively send clear data and/or cipher data to the hash circuit and to an output FIFO memory buffer, which handles final processing under the control of the output control unit prior to sending fully processed data to the write interface.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: September 4, 2007
    Assignee: ITT Manufacturing Enterprises, Inc.
    Inventors: Satish N. Anand, Hemanshu Bhatnagar, Swaroop Admusumilli, James Darren Parker
  • Publication number: 20020191790
    Abstract: A cryptographic processing system includes a cipher circuit and hash circuit. An input control unit and output control unit work together to process data packets in a pipelined manner wherein the data packets move through the processing system in a single-pass. The input control unit manages data received from a read interface and the initiation of cipher processing of the data in the cipher circuit. The output control unit manages data output to a write interface and the hash processing of the data in the hash circuit. Data moves through the cipher circuit in clear data and cipher data form so that the output control unit may selectively send clear data and/or cipher data to the hash circuit and to an output FIFO memory buffer, which handles final processing under the control of the output control unit prior to sending fully processed data to the write interface.
    Type: Application
    Filed: May 13, 2002
    Publication date: December 19, 2002
    Inventors: Satish N. Anand, Hemanshu Bhatnagar, Swaroop Admusumilli, James Darren Parker
  • Publication number: 20020191793
    Abstract: A cryptographic processing system includes a cipher circuit and hash circuit. An input control unit and output control unit work together to process data packets in a pipelined manner wherein the data packets move through the processing system in a single-pass. The input control unit manages data received from a read interface and the initiation of cipher processing of the data in the cipher circuit. The output control unit manages data output to a write interface and the hash processing of the data in the hash circuit. Data moves through the cipher circuit in clear data and cipher data form so that the output control unit may selectively send clear data and/or cipher data to the hash circuit and to an output FIFO memory buffer, which handles final processing under the control of the output control unit prior to sending fully processed data to the write interface.
    Type: Application
    Filed: May 13, 2002
    Publication date: December 19, 2002
    Inventors: Satish N. Anand, Hemanshu Bhatnagar, Swaroop Admusumilli, James Darren Parker