Patents by Inventor Swati Saxena

Swati Saxena has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10227930
    Abstract: A compressor assembly for a turbomachine includes a compressor wall including circumferentially spaced stator vanes defining at least one row of stator vanes. The at least one row of stator vanes defines at least one stator passage therein. Each stator vane includes a leading edge, an opposite trailing edge defining an axial chord distance, and a pressure side. The compressor assembly also includes, at least one bleed opening defined within the compressor wall and disposed adjacent the pressure side in the at least one stator passage within a range from approximately 20% the axial chord distance upstream of the leading edge to approximately 20% the axial chord distance downstream of the trailing edge. The compressor assembly further includes at least one bleed arm extending from the at least one bleed opening with at least a portion of compressor airflow extractable through the at least one bleed arm.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: March 12, 2019
    Assignee: GENERAL ELECTRIC COMPANY
    Inventors: Swati Saxena, Ajay Keshava Rao, Rudolf Konrad Selmeier, Grover Andrew Bennett, Giridhar Jothiprasad, Corey Bourassa, Byron Andrew Pritchard
  • Patent number: 10132323
    Abstract: A compressor is provided including a casing, a hub, a flowpath, a plurality of blades defining a plurality of axially extending compressor stages and an endwall treatment formed in the casing on at least two downstream most stages of the plurality of compressor stages. The remaining stages of the plurality of compressor stages located upstream of the at least two downstream most stage are devoid of any endwall treatment. Each of the endwall treatments faces a tip of each blade in the at least two downstream most stages. The tip of each blade and the endwall treatment are configured to move relative to each other. The endwall treatment formed in the casing on at least two downstream most stages of the plurality of compressor stages is configured to extend a stall margin to delay stall due to ice ingestion. A method and engine application are disclosed.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: November 20, 2018
    Assignee: GENERAL ELECTRIC COMPANY
    Inventors: Swati Saxena, Andrew Breeze-Stringfellow, Rajkeshar Vijayraj Singh, Tsuguji Nakano
  • Publication number: 20170276141
    Abstract: A compressor assembly for a turbomachine includes a compressor wall including circumferentially spaced stator vanes defining at least one row of stator vanes. The at least one row of stator vanes defines at least one stator passage therein. Each stator vane includes a leading edge, an opposite trailing edge defining an axial chord distance, and a pressure side. The compressor assembly also includes, at least one bleed opening defined within the compressor wall and disposed adjacent the pressure side in the at least one stator passage within a range from approximately 20% the axial chord distance upstream of the leading edge to approximately 20% the axial chord distance downstream of the trailing edge. The compressor assembly further includes at least one bleed arm extending from the at least one bleed opening with at least a portion of compressor airflow extractable through the at least one bleed arm.
    Type: Application
    Filed: March 28, 2016
    Publication date: September 28, 2017
    Inventors: Swati Saxena, Ajay Keshava Rao, Rudolf Konrad Selmeier, Grover Andrew Bennett, Giridhar Jothiprasad, Corey Bourassa, Byron Andrew Pritchard
  • Publication number: 20170089217
    Abstract: A compressor is provided including a casing, a hub, a flowpath, a plurality of blades defining a plurality of axially extending compressor stages and an endwall treatment formed in the casing on at least two downstream most stages of the plurality of compressor stages. The remaining stages of the plurality of compressor stages located upstream of the at least two downstream most stage are devoid of any endwall treatment. Each of the endwall treatments faces a tip of each blade in the at least two downstream most stages. The tip of each blade and the endwall treatment are configured to move relative to each other. The endwall treatment formed in the casing on at least two downstream most stages of the plurality of compressor stages is configured to extend a stall margin to delay stall due to ice ingestion. A method and engine application are disclosed.
    Type: Application
    Filed: September 30, 2015
    Publication date: March 30, 2017
    Inventors: Swati Saxena, Andrew Breeze-Stringfellow, Rajkeshar Vijayraj Singh, Tsuguji Nakano
  • Patent number: 8099614
    Abstract: The invention relates to a controlled shut-down of an electronic circuit or circuits such that the electrical power consumption of that circuit or circuits is minimized and that each said circuit is at a status which is a pre-determined state (42; 52) of that said circuit wherein all of its own control and messaging signals are taken to their zero level. The present invention claimed relates to the methodology of entering said circuit into this pre-determined state (42;52); where all said signal and messaging lines are taken to zero; thereby reducing power consumption within an electronic circuit when its status is defined as being shut-down or standby.
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: January 17, 2012
    Assignee: NXP B.V.
    Inventors: Tim Pontius, Swati Saxena, Neal Wingen, Niranjan A. Puttaswamy
  • Publication number: 20080256377
    Abstract: The invention relates to a controlled shut-down of an electronic circuit or circuits such that the electrical power consumption of that circuit or circuits is minimized and that each said circuit is at a status which is a pre-determined state (42; 52) of that said circuit wherein all of its own control and messaging signals are taken to their zero level. The present invention claimed relates to the methodology of entering said circuit into this pre-determined state (42;52); where all said signal and messaging lines are taken to zero; thereby reducing power consumption within an electronic circuit when its status is defined as being shut-down or standby.
    Type: Application
    Filed: September 11, 2006
    Publication date: October 16, 2008
    Applicant: NXP B.V.
    Inventors: Tim Pontius, Swati Saxena, Neal Wingen, Niranjan Ap
  • Patent number: 6931524
    Abstract: An adaptive data communication approach permits communication bus monitoring by using a reconfigurable bus monitor built into the CPU bus structure and adapted to report back to the CPU in response to detecting certain CPU-programmed events. In one particular example embodiment, a circuit arrangement having a CPU circuit communicates with another device over a communication channel while a reconfigurable circuit monitors the communication channel. The CPU circuit configures the reconfigurable circuit for monitoring any of various types of event expected to occur on the communication channel. The reconfigurable circuit collects signals passed on the communication channel and reports back to the CPU circuit when data indicative of the first event type occurs on the communication channel.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: August 16, 2005
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Gregory E. Ehmann, Swati Saxena
  • Publication number: 20030046522
    Abstract: An adaptive data communication approach permits communication bus monitoring by using a reconfigurable bus monitor built into the CPU bus structure and adapted to report back to the CPU in response to detecting certain CPU-programmed events. In one particular example embodiment, a circuit arrangement having a CPU circuit communicates with another device over a communication channel while a reconfigurable circuit monitors the communication channel. The CPU circuit configures the reconfigurable circuit for monitoring any of various types of event expected to occur on the communication channel. The reconfigurable circuit collects signals passed on the communication channel and reports back to the CPU circuit when data indicative of the first event type occurs on the communication channel.
    Type: Application
    Filed: August 29, 2001
    Publication date: March 6, 2003
    Applicant: Koninklijke Philips Electronics N.V.
    Inventors: Gregory E. Ehmann, Swati Saxena