Patents by Inventor Swati V. Joshi

Swati V. Joshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7525836
    Abstract: A memory cell includes a master cell storing first true/complement data and a slave cell storing second true/complement data. A first circuit associated with the slave cell is operable responsive to a first clock signal to copy first true/complement data from the master cell into the slave cell with same state to be the second true/complement data. A second circuit associated with the master cell is operable response to a second clock signal, which is a non-overlapping complement of the first clock signal, to copy second true/complement data from the slave cell into the master cell with complementary state to be the first true/complement data. A read/write circuit includes circuitry for supporting true/complement data read and write operations with respect to the master cell in either same polarity or opposite polarity state.
    Type: Grant
    Filed: April 15, 2008
    Date of Patent: April 28, 2009
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Robert M. Backus, Charles F. Duffey, Andrew C. Weil, Swati V. Joshi
  • Publication number: 20080192553
    Abstract: A memory cell includes a master cell storing first true/complement data and a slave cell storing second true/complement data. A first circuit associated with the slave cell is operable responsive to a first clock signal to copy first true/complement data from the master cell into the slave cell with same state to be the second true/complement data. A second circuit associated with the master cell is operable response to a second clock signal, which is a non-overlapping complement of the first clock signal, to copy second true/complement data from the slave cell into the master cell with complementary state to be the first true/complement data. A read/write circuit includes circuitry for supporting true/complement data read and write operations with respect to the master cell in either same polarity or opposite polarity state.
    Type: Application
    Filed: April 15, 2008
    Publication date: August 14, 2008
    Inventors: Robert M. Backus, Charles F. Duffey, Andrew C. Weil, Swati V. Joshi
  • Patent number: 7379325
    Abstract: A memory cell includes a master cell storing first true/complement data and a slave cell storing second true/complement data. A first circuit associated with the slave cell is operable responsive to a first clock signal to copy first true/complement data from the master cell into the slave cell with same state to be the second true/complement data. A second circuit associated with the master cell is operable response to a second clock signal, which is a non-overlapping complement of the first clock signal, to copy second true/complement data from the slave cell into the master cell with complementary state to be the first true/complement data. A read/write circuit includes circuitry for supporting true/complement data read and write operations with respect to the master cell in either same polarity or opposite polarity state.
    Type: Grant
    Filed: April 12, 2006
    Date of Patent: May 27, 2008
    Assignee: Maxim Intergrated Products, Inc.
    Inventors: Robert M. Backus, Charles F. Duffey, Andrew C. Weil, Swati V. Joshi
  • Patent number: 5788829
    Abstract: A method and apparatus for electroplating a workpiece to achieve a uniform plating thickness includes a cathode rack having a hook from which the workpiece is suspended and spaced apart from a consumable anode. The rack includes a plurality of plates made of the same material as the anode disposed on opposite sides of the rack. The plates direct a portion of the current emanating from the anode away from the workpiece to produce more uniform plating.
    Type: Grant
    Filed: October 16, 1996
    Date of Patent: August 4, 1998
    Assignee: Mitsubishi Semiconductor America, Inc.
    Inventors: Swati V. Joshi, Robert R. Botts, Louis W. Nicholls
  • Patent number: 5776327
    Abstract: A method and apparatus are provided for electroplating a workpiece. The apparatus includes an anode basket containing particles of an electroplating material. A mask is positioned around the anode basket to selectively block current flow from the basket to the workpiece which is mounted to a cathode. The mask includes a frame supporting a number of non-conductive plates adjusted in position to provide a desired electrical field distribution. The resulting electrical field between the anode and the cathode produces uniform plating thickness over the entire surface of the workpiece.
    Type: Grant
    Filed: October 16, 1996
    Date of Patent: July 7, 1998
    Assignee: Mitsubishi Semiconuctor Americe, Inc.
    Inventors: Robert R. Botts, Swati V. Joshi, Louis W. Nicholls
  • Patent number: 5744013
    Abstract: An anode basket containing anode particles used for electroplating a work piece. The anode basket includes baffles positioned inside the basket at selected locations. Hinges secure the baffles to opposing sidewalls of the basket and allow the baffles to pivot when sufficient manual force is applied to the respective hinges and/or baffle. The hinged baffles can be positioned to form separate compartments, enabling anode particles to be placed in different amounts at selected locations. If desired, some of the locations can have no anode particles. This permits more focused control of the metal ions.
    Type: Grant
    Filed: December 12, 1996
    Date of Patent: April 28, 1998
    Assignee: Mitsubishi Semiconductor America, Inc.
    Inventors: Robert R Botts, Swati V. Joshi, Louis W. Nicholls